Happy Thursday!

NVIDIA just posted its best quarter ever, and the stock dropped. Meta committed up to $100 billion to AMD. And Finland’s IQM is about to become the first European quantum company on a U.S. stock exchange.

Funding News: Over $1.1B raised for AI chip startups in a single day, plus fresh rounds across edge AI, compute orchestration, and quantum hardware

Bonus: Why $1.1 billion in AI chip funding on one day signals the end of GPU monoculture

Spotlights

Nvidia Posts Record $68.1B Quarter, Then Loses $260B in Market Cap (CNBC)

(Credit: Nvidia)

NVIDIA delivered a blowout Q4: $68.1 billion in revenue (up 73% year-over-year), with data center revenue reaching $62.3 billion. Q1 guidance of $78 billion crushed consensus by roughly $5 billion. Notably, Nvidia assumed zero revenue from China data center compute in its guidance and still beat estimates.

The market’s response? A 5.6% drop, erasing roughly $260 billion in market cap, the worst post-earnings session in ten months. This seems part of a broader rotation out of mega-cap tech, which amplified the selloff.

On the product side, NVIDIA confirmed that the first Vera Rubin GPU samples have shipped to customers, pairing an 88-core Arm-based Vera CPU with Rubin GPUs that each carry 288 GB of HBM4. Production is on track for H2 2026.

Meanwhile, TrendForce reports the next-gen Feynman architecture will be fabricated on TSMC’s A16 node, with Samsung and SK Hynix set to showcase HBM4 at GTC 2026 (March 16–19).

Meta Strikes Up to $100B AMD Chip Deal, Reshaping AI Procurement (TechCrunch)

(Credit: AMD)

Meta announced a multi-year agreement to deploy up to 6 gigawatts of AMD Instinct GPUs, potentially worth over $100 billion. That makes it the largest single AI chip commitment to a non-NVIDIA supplier. AMD issued Meta performance-based warrants for up to 160 million shares, roughly 10% of the company.

The deal mirrors AMD’s earlier OpenAI warrant structure and came just days after Meta’s expanded commitment to NVIDIA. Shipments of custom MI450 GPUs begin H2 2026. Meta has pledged $135 billion in capex for 2026 and $600 billion in U.S. data centers.

What makes this deal structurally significant is the warrants. They transform a supplier-customer relationship into a strategic partnership, giving Meta direct upside in AMD’s success. If this model spreads (and OpenAI has already adopted it), chip procurement will start looking less like purchasing and more like venture investing.

IQM Announces $1.8B SPAC, Becoming First European Quantum Company Headed to U.S. Exchange (TechCrunch)

(Credit: IQM)

Finland-based IQM Quantum Computers announced a definitive merger with Nasdaq-listed RAAQ (Real Asset Acquisition Corp), valuing IQM at $1.8 billion pre-money. IQM will become the first European quantum computing company to go public on a U.S. exchange.

The company expects more than $450 million in cash at closing, combining $175 million from the SPAC trust, a $134 million PIPE, and existing reserves. IQM has sold 21 quantum systems to 13 customers across 14 countries, generating approximately $35 million in revenue in 2025. Transaction close is expected around June 2026.

IQM joins an accelerating quantum IPO wave: Infleqtion listed on NYSE as INFQ in February, SEEQC announced its own SPAC, and Xanadu plans to list by the end of March.

Headlines

Semiconductors & AI Hardware

• OpenAI closes $110B, the largest private funding round in history, backed by Amazon ($50B), Nvidia ($30B), and SoftBank ($30B)

• Broadcom ships first 2nm custom AI chip on 3.5D packaging for Fujitsu; sits on a $73B AI chip backlog

• Nvidia ships first Vera Rubin GPU samples; GTC 2026 keynote in two weeks (March 16)

• TSMC raises 2026 capex to $52–56B; January revenue up 37% YoY

• DRAM contract prices surge 55–95% QoQ in Q1 2026; DDR5 spot prices have quadrupled since September

• SIA: Global semiconductor sales hit $792B in 2025, on track for $1 trillion in 2026

• Intel delays $100B Ohio fab to 2030

• China aims for 5× increase in advanced chip output to meet AI demand; targets 500K wpm by 2030

Quantum

• IonQ surpasses $100M annual revenue ($130M, +202% YoY), the first pure-play quantum company to hit the milestone

• D-Wave reports 179% revenue growth in 2025; $32.8M in post-year bookings; relocating HQ to Boca Raton

• IonQ selected for $151B Missile Defense Agency SHIELD IDIQ contract

• IonQ deploys Romania’s national QKD network: 1,500+ km across 6 cities, covering over 20% of Europe’s terrestrial quantum comms infrastructure

• Origin Quantum releases China’s first domestic quantum OS as quantum enters the country’s 15th Five-Year Plan

• Xanadu and Lockheed Martin launch quantum ML research initiative

• DOE quantum centers achieve ion-trap computing breakthrough toward scalable quantum architectures

• Institutional investors trim quantum stock positions in Q4 2025 13F filings

Data Centers & Energy

• Google pays Form Energy ~$1B for a 30 GWh iron-air battery, the world’s largest, capable of 100-hour continuous discharge

• Blackstone plans publicly traded company for AI data center acquisition spree

• JLL: Data center expansion hits “inflection point” with 1% vacancy for second straight year; 92% of capacity under construction is pre-committed

• Proxima Fusion signs €2B MoU for Europe’s first commercial fusion plant, explicitly citing AI data center demand

Photonics & Networking

• Ciena unveils Vesta 200, the industry’s first pluggable co-packaged optics engine at 6.4 Tbps, cutting power by 70%

• Photonic latch memory hits 60 GHz: 20× faster than electronic caches, built on GlobalFoundries’ 300mm process

Funding News

A historic week for AI chip funding, with three startups raising a combined $1.1B+ on the same day (February 24). Edge AI, compute orchestration, and quantum hardware also drew capital.

Bonus: The Great Unbundling of AI Compute

Three AI chip startups raised a combined $1.1 billion on February 24, each targeting a different layer of the compute stack: MatX for training, SambaNova for inference, and Axelera for edge.

MatX ($500M, led by Jane Street and Leopold Aschenbrenner’s Situational Awareness fund) is building custom training ASICs, claiming 10× GPU throughput for large language models.

SambaNova ($350M, led by Vista Equity Partners) unveiled its SN50 inference chip, claiming 5× Blackwell performance at a third of the cost, and signed Intel as both investor and manufacturing partner after acquisition talks at ~$1.6B reportedly fell through.

Axelera AI ($250M, backed by BlackRock and Samsung Catalyst) raised the largest-ever round for a European AI chip company, targeting edge inference with 500+ customers already deployed.

The pattern is clear: the AI compute market is unbundling into specialized domains (training, inference, edge), each with distinct hardware requirements and economic models.

And the investors aren’t just VCs anymore. Intel, Marvell, BlackRock, and Samsung are placing strategic bets. Meta’s $100B AMD deal and its 160-million-share warrant structure suggest even customers are diversifying their chip exposure like a portfolio.

This is also why NVIDIA acquired Groq for $20B late last year. It was the clearest admission that even the dominant player isn’t certain GPUs are the answer to everything—inference requires different chips than training.

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Happy Tuesday!

NVIDIA is about to write one of the largest checks in AI history; a Toronto startup unveiled a chip that permanently embeds model weights in transistors; and quantum networking just hit a 10,000x milestone on the streets of New York City.

Here's what to expect in this week's newsletter:

• Spotlights: Nvidia nears a ~$30B equity stake in OpenAI's record mega-round, Taalas exits stealth with $169M and a radical inference chip claiming 73x faster than H200, and Qunnect and Cisco demonstrate 10,000× faster quantum entanglement swapping over NYC fiber

• Funding News: $200M+ for solid-state transformers, a new quantum VC fund, and fresh rounds across AI chips, photonics, and power delivery

• Bonus: Why solid-state transformers are the unexpected picks-and-shovels play of the AI buildout

Spotlights

Nvidia Nears ~$30B Equity Investment in OpenAI as Mega-Round Tops $100B (Reuters)

(Credit: Nvidia)

NVIDIA is said to finalize a direct ~$30B equity stake in OpenAI, replacing an earlier $100B infrastructure partnership that never progressed beyond a letter of intent. The investment is part of OpenAI's record mega-round expected to exceed $100B total, valuing the company at roughly $830B. SoftBank and Amazon are also expected participants.

The deal marks a strategic pivot. Rather than tying investment to infrastructure milestones, NVIDIA gains immediate equity in what CEO Jensen Huang called "one of the most consequential companies of our time". OpenAI is expected to reinvest much of the capital into NVIDIA hardware.

The circular economics here are hard to ignore: NVIDIA funds OpenAI, which spends the money buying NVIDIA chips. Some analysts call it vendor financing; others call it locking in the most important customer relationship in AI. Either way, it's the single largest chip-company-to-AI-lab investment in history, and it arrives three days before NVIDIA’s Q4 FY2026 earnings on February 25.

Taalas Exits Stealth with $169M and an Inference Chip That Hardcodes AI into Silicon (SiliconANGLE)

(Credit: Taalas)

Toronto-based Taalas emerged from stealth on February 19 with $169M in funding ($219M total) and a genuinely unconventional approach to AI inference: its HC1 chip "prints" model weights directly into transistors using mask ROM, rather than loading them into memory at runtime.

The result, according to the company: 73x more tokens per second than NVIDIA's H200 on Llama 3.1 8B, at one-tenth the power. By eliminating the memory bottleneck entirely — by physically etching weights into the chip — Taalas sidesteps the HBM shortage strangling competitors. The tradeoff: each chip is model-specific, meaning a new model requires a new chip.

Founded by ex-Tenstorrent CEO Ljubisa Bajic, Taalas claims its foundry-optimized workflow with TSMC can deliver a custom chip from model weights to deployed inference card in two months. Backed by Quiet Capital, Fidelity, and veteran semiconductor investor Pierre Lamond. A chip targeting frontier-class models is planned for end of 2026.

Qunnect and Cisco Achieve 10,000x Quantum Networking Milestone Over NYC Fiber (The Quantum Insider)

(Credit: Quantum Zeitgeist)

Qunnect and Cisco demonstrated the first metro-scale quantum entanglement swapping over 17.6 km of deployed commercial fiber in New York City. The system achieved 1.7 million entangled pairs per hour locally and 5,400 pairs per hour over deployed fiber — nearly 10,000x better than previous benchmarks — with greater than 99% polarization fidelity.

What makes this notable beyond the raw numbers is the hardware: Qunnect's room-temperature endpoints and Cisco's orchestration software running on existing telecom infrastructure. No cryogenics in the field. No dedicated dark fiber. The quantum data coexists with classical internet traffic.

Days earlier, Photonic Inc. and TELUS achieved quantum teleportation over 30 km of commercial fiber in Canada, and Deutsche Telekom replicated similar results in Berlin. Three countries, three demonstrations, all on production fiber.

Headlines

Semiconductors

• Jensen Huang teases "mystery chips the world has never seen" for GTC 2026 (March 16-19)

• NVIDIA secures multigenerational Meta deal for millions of GPUs, including Grace standalone CPUs, covering a major slice of Meta's $115-135B 2026 capex

• AMD denies MI455X delay reports as "total BS", says Helios rack-scale systems remain on target for H2 2026

• Samsung and SK Hynix accelerate memory fab construction amid 60% fulfillment crisis; DRAM contract prices surging 90-95% QoQ

• SCOTUS strikes down IEEPA tariffs in landmark 6-3 ruling; 25% semiconductor Section 232 tariffs survive under separate authority

• China targets 70% domestic chip equipment by 2027; prototype EUV machine assembled, but hasn't produced a working chip

Quantum

• Pasqal delivers Italy's first neutral atom quantum computer (140 qubits) at CINECA supercomputing center under EuroHPC

• Norwegian scientists discover potential triplet superconductor (NbRe) that could dramatically stabilize quantum computers

• First single-shot Majorana qubit readout achieved by QuTech/CSIC, confirming topological qubit viability

• NSF launches $100M quantum and nanotech infrastructure program with up to 16 open-access facilities

Data Centers and Cloud

• Reliance unveils 10 trillion rupee ($110B) AI infrastructure plan over 7 years, targeting 3 GW of AI data centers

• JLL forecasts $3 trillion DC investment "supercycle" by 2030; Texas to overtake Northern Virginia as world's largest market

• Washington Post investigation: Silicon Valley is building a "shadow power grid" for data centers

• EnCharge AI launches EN100, the first commercial analog in-memory AI accelerator at 20x performance per watt

Neuromorphic and Photonics

• Sandia: neuromorphic computers solve partial differential equations, published in Nature Machine Intelligence

• UT San Antonio launches THOR, the nation's first open-access neuromorphic computing hub

Funding News

A strong week for compute infrastructure. Two solid-state transformer startups raised a combined $200M on the same day (see Bonus below), while AI inference silicon, quantum networking, and power delivery all drew significant capital.

Also notable: Nscale signed a $1.4B GPU-backed debt facility to finance their European AI cluster deployment.

Bonus: The Most Boring Part of a Data Center Just Became a $200M Startup Category

(Credit: Heron Power)

Here's something nobody talks about when discussing the AI infrastructure buildout: the transformer. Not the neural network architecture — the actual, physical electrical transformer that sits between the power grid and every server rack.

These devices, based on technology largely unchanged since the 1890s, convert high-voltage utility power into the low-voltage DC that chips need. They're massive, heavy, inefficient, and increasingly the bottleneck holding back data center deployment timelines. Lead times for large power transformers can stretch to three years or more.

On February 18, two startups raised a combined $200M to replace them.

Heron Power closed a $140M Series B led by a16z and Breakthrough Energy Ventures to scale its solid-state transformer, "Heron Link." Each unit handles 5 MW and converts medium-voltage AC directly to the 800V DC that Nvidia's latest rack designs need -- eliminating roughly 70% of the legacy power conversion equipment in a data center. The company reports more than 40 GW in customer inquiries. It was founded by Drew Baglino, Tesla's former SVP of Powertrain and Energy.

The same day, DG Matrix raised a $60M Series A backed by ABB. Its "Interport" platform routes power from multiple sources at different voltages — useful for data centers mixing grid, solar, battery, and generator inputs.

What makes this interesting beyond the hardware is what it signals about the AI buildout's maturation. For three years, the bottleneck narrative has centered on GPUs, then HBM, then energy generation. Now it's reaching the mundane, physical layer: the power conversion equipment between the grid and the chip. GPUs are useless if you can't deliver clean power to them fast enough.

It's the ultimate picks-and-shovels play. Boring technology and an enormous market.

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Happy Tuesday!

Over the last two weeks, quantum computing saw its largest M&A deal ever, Samsung ships the world’s first commercial HBM4, and a startup proves you can beat the GPU giant at its own game. With FPGAs.

Here's what to expect in this week's newsletter:

• Spotlights: IonQ acquires SkyWater Technology for $1.8 billion to become the first vertically integrated quantum platform, Samsung ships the world’s first commercial HBM4, and Positron hits unicorn status with $230M from Arm and Qatar

• Funding News: Big rounds in AI chips, photonics, and quantum networking

• Bonus: Why Nvidia's 90% market share is finally starting to crack

Spotlights

IonQ Makes Quantum’s Largest Acquisition with $1.8B SkyWater Deal (IonQ)

(Credit: IonQ)

IonQ announced the acquisition of U.S. semiconductor foundry SkyWater Technology for $1.8 billion — the largest M&A transaction in quantum computing history.

The deal ($770M cash, remainder in stock) transforms IonQ into the world's only vertically integrated quantum platform company, with in-house chip design, fabrication, and packaging across facilities in Minnesota, Florida, and Texas.

Why does that matter? Speed.

IonQ claims it can now shrink its 256-qubit chip development timeline from nine months to just two. "The combination of Oxford plus SkyWater makes IonQ an inevitability to prevail," said Chairman & CEO Niccolo de Masi.

SkyWater brings critical capabilities: DMEA Category 1A Trusted Foundry status, ~$300M in government investment, and existing quantum customers including D-Wave and PsiQuantum. IonQ has accelerated its roadmap accordingly, now targeting 200,000-qubit QPUs (8,000 logical qubits) for 2028.

Wall Street's reaction was mixed. The stock initially rose 4% before closing down on dilution concerns. But for quantum bulls, the message is clear: the consolidation era has begun.

Samsung Ships Industry-First Commercial HBM4, Igniting Next-Gen Memory Race (Bloomberg)

(Credit: Samsung)

Samsung announced on February 12 that it has begun commercial shipments of HBM4, making it the first company in the world to do so. The next-generation memory delivers 11.7 Gbps per pin (upgradable to 13 Gbps) and 3.3 TB/s per stack, and is manufactured on Samsung's most advanced DRAM process node.

The chips are destined for Nvidia's Vera Rubin platform, expected later this year. Samsung shares surged 7.6% on the announcement, hitting an all-time high.

SK Hynix, which dominated the HBM3e cycle as Nvidia's primary supplier, is close behind with its own HBM4 mass production expected by March/April. The stakes are enormous: TrendForce estimates HBM revenue will exceed $100B in 2026, and Samsung plans to triple its HBM sales this year. For AI infrastructure, this is the current bottleneck that will slowly start to break open.

Positron Raises $230M Series B to Challenge Nvidia on Efficiency (TechCrunch)

(Credit: Positron)

Positron closed a $230M Series B on February 4, valuing the AI chip startup at over $1 billion. Strategic investors include Arm Holdings and the Qatar Investment Authority; sovereign wealth funds are now diversifying beyond Nvidia.

The company's Atlas chip takes an unconventional approach: rather than competing on raw compute, Positron optimizes for memory bandwidth utilization. Where GPUs typically achieve 10-30% memory efficiency, Atlas achieves 93%, delivering comparable performance to an H100 while consuming less than one-third the power.

"In our testing, Positron Atlas delivered roughly 3× lower end-to-end latency than a comparable H100-based system," said Jump Trading CTO Alex Davies, whose firm both invested and deployed the chips.

Founded by ex-Lambda executives Mitesh Agrawal (CEO) and Thiel Fellow Thomas Sohmers (CTO), Positron has now raised a total of $305M. The current FPGA-based Atlas ships to customers, including Cloudflare. A custom ASIC called "Asimov" with 2TB of LPDDR5x tapes out in Q3 2026. Critically, everything is manufactured in Arizona, bypassing the CoWoS and HBM bottlenecks strangling competitors.

Headlines

Semiconductors & AI Hardware

• EU inaugurates €2.5B NanoIC pilot line at IMEC — Europe's first facility with the most advanced EUV lithography

• UK AI chip startup Fractile commits £100M to expand UK operations, targeting H2 2026 tapeout for inference chips

• Applied Materials pays $252.5M to settle China export probe, beats Q1 estimates

• Cadence launches ChipStack AI "Super Agent" for agentic chip design — Nvidia, Qualcomm as early users

• SIA: Global semiconductor sales hit $798B in 2025, on track for $1 trillion in 2026

• Microsoft launches Maia 200, its most powerful AI chip yet

• Intel Foundry demos massive AI test chip with 12 HBM4 stacks at 8x reticle size

Quantum

• Infleqtion SPAC merger approved (90%+ votes), lists on NYSE as INFQ on February 17

• EU launches €50M SUPREME consortium for superconducting quantum industrialization with 23 partners, including IQM and Infineon

• Spain invests €9.75M in Nu Quantum to build European quantum networking hub in Madrid

• Diraq secures $14M investment for Silicon Quantum Commercialization

• Euro-Q-Exa quantum computer inaugurated at LRZ Munich — IQM's 54-qubit system, third EuroHPC quantum deployment

Infrastructure & Policy

• Mistral invests $1.4B in data centres in Sweden

• Why the economics of orbital AI are so brutal

• Cisco unveils Silicon One G300: 102.4 Tbps AI networking chip challenging Broadcom and Nvidia

• U.S. lawmakers demand blanket ban on chipmaking tool exports to China, targeting ASML

• Nvidia H200 sales to China stalled by the State Department’s security review

Funding News

Bonus: The Cracks in Nvidia's Monopoly Are Finally Showing

For years, the "Nvidia alternative" narrative has been a punchline. Startups raised billions, hyperscalers announced custom chips, and yet Jensen Huang's company kept posting gross margins above 80% while competitors shipped PowerPoint decks.

But something feels different this time.

Nvidia's AI accelerator market share has dropped from ~95% at its peak to 75-80% today, according to multiple analyst estimates. Custom ASIC shipments are growing at 44.6% annually versus 16.1% for GPUs. And hyperscaler decoupling is underway: Microsoft's Maia 200 now powers Copilot, Amazon’s Trainium3 runs Anthropic's Claude, and Google's TPU v7 handles most internal inference.

The shift is driven by economics. AWS is pitching Trainium at a 30–40% price-performance advantage over general-purpose GPUs for inference workloads, while Meta reports 44% lower costs with its MTIA chips. When you're spending $100B+ on AI infrastructure annually, those percentages translate to tens of billions in savings.

But here's what's underappreciated: even the startups are finally shipping real products. Positron's Atlas cards are running in Cloudflare's datacenters. Cerebras is preparing a $20B+ IPO. And Groq got acquired by Nvidia itself for $20B, the ultimate validation that the threat was real.

None of this means Nvidia is in trouble. CUDA's 20-year ecosystem moat is real, and training workloads still strongly favor their hardware. But the era of 90%+ market share is ending.

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Happy Tuesday!

This marks the first edition since Emily moved on to other projects, and Fynn took over writing this newsletter together with Benjamin.

We reworked the newsletter format to make it easier to digest while keeping the mission the same: bringing you the latest news, deep dives, curated headlines, funding updates, and geopolitical context — now every Tuesday.

Here’s what to expect in this week’s newsletter:

• Spotlights: Neurophos secures a $110M Series A, the memory chip shortage meets tariff threats, and D-Wave finalizes a $550M acquisition in quantum computing

• Funding News: Large rounds in photonics and AI infrastructure build-out

• Bonus: Why 2026 could be the year quantum goes public

Spotlights

Neurophos Secures $110M for Revolutionary Photonics AI Chips (TechCrunch)

(Credit: Neurophos)

Austin-based startup Neurophos has closed an impressive $110M Series A funding round to advance the development of its next-generation photonics processors. The round was led by Gates Frontier, Bill Gates' venture capital firm, and included prominent names like Microsoft's M12 and Bosch Ventures.

The core innovation is a "metasurface modulator" that functions as an optical processing unit (OPU).

According to the company, these metamaterial-based components are about 10,000 times smaller than traditional optical transistors, enabling massive parallel processing directly in the optical domain. "We have de-risked the fundamental physics," said CEO Patrick Bowen.

Neurophos claims its OPU can achieve up to a 50x advantage over Nvidia's current Blackwell architecture in both energy efficiency and speed by the time its first chips will hit the market in mid-2028, positioning itself as a key player in the race for energy-efficient computing.

The Battle for Memory Chips: AI Boom Meets Supply Squeeze and Tariff Threats

(Credit: WSJ)

Driven by the AI industry's insatiable demand for High-Bandwidth Memory (HBM), the memory chip market is heading for a massive shortage.

A recent Wall Street Journal article paints the picture: costs are set to rise across everything from smartphones to cars, as up to 70 percent of memory chips will be absorbed by data centers in 2026.

This demand shock was exacerbated by aggressive maneuvers from industry giants. Last October, OpenAI reportedly struck deals with Samsung and SK Hynix to secure up to 40% of the global DRAM supply for its “Stargate” AI infrastructure project, which caused a frenzy among competitors.

The fallout was immediate, forcing competitors to scramble and reportedly leading to the dismissal of Google’s head of procurement. Now, the automotive industry, increasingly reliant on memory for infotainment and driver-assistance systems, could face production disruptions as early as next quarter, according to a warning from UBS.

Adding geopolitical tension to the supply squeeze, the U.S. government has threatened South Korean manufacturers with 100% tariffs if they do not increase their efforts to build production capacity within the United States.

This combination of exploding demand, strategic supply hoarding, and political pressure is creating a memory super-cycle, and memory prices may stay inflated until 2027, as per Yole.

D-Wave Becomes First Dual-Platform Quantum Company with $550M Acquisition (QuantumZeitgeist)

(Credit: D-Wave)

In one of the largest consolidation moves in the quantum computing sector to date, D-Wave has completed its acquisition of Quantum Circuits Inc. (QCI) for $550 million, making it the first company in the world to develop and offer both quantum annealing and universal gate-model systems.

Through the acquisition, D-Wave integrates QCI's innovative "dual-rail qubit" technology. These qubits promise to overcome one of the biggest hurdles on the path to fault-tolerant quantum computing: quantum error correction.

QCI's architecture aims to combine the speed of superconducting systems with the high fidelity of ion trap approaches, enabling more hardware-efficient error correction. D-Wave plans to release an initial gate-model system based on this technology as early as 2026.

For customers, this widens the use cases: Annealing already handles industrial optimization, while gate-model systems open the door to tougher problems in materials science and pharmaceuticals.

Headlines

SQLank Spin Out at $400M valuation

TSMC Q4 2025: Record $33.7B quarterly revenue, up 25.5% year-over-year

Intel Stock down despite beating expectations

EpochAI has updated its Frontier Data Center Report, a great source to understand the current build-out

Europe starts €50M Quantum Pilot

Alice & Bob Achieves 10,000x Lower Error Rate with “Elevator Codes”

Microsoft Launches $200K Quantum Research Program

Funding News

Last week saw a wave of large funding rounds across AI infrastructure, photonics, and cloud.

Bonus: The Quantum IPO Pipeline Heats Up for 2026

After a period of private-market growth, the quantum computing industry appears to be entering a new phase of maturity, with several leading startups preparing to go public in 2026.

The most anticipated debut is that of Quantinuum, Honeywell’s majority-owned subsidiary. The company confidentially filed for an IPO in mid-January. With an estimated valuation of over $20 billion, the offering could raise around $1 billion, making it one of the largest and most significant traditional IPOs in the sector's history.

Joining the pipeline is SEEQC, a developer of superconducting quantum chips, which announced a definitive merger agreement with a special purpose acquisition company (SPAC), Allegro Merger Corp. The deal values the company at approximately $1 billion.

Furthermore, photonics quantum computing firm Xanadu has announced plans to go public in late 2026, adding another technology to the mix of publicly traded quantum companies.

In these developments, the specific IPO route matters. Quantinuum’s traditional filing demands real financial scrutiny and signals genuine market readiness. SEEQC’s SPAC, on the other hand, looks more like an already familiar pattern: private investors seeking liquidity after years of holding. For the quantum sector, these offerings are a credibility test: their performance will shape how mainstream capital views the industry going forward.

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: How programmability is being designed into modern SoCs, with DSPs, reconfigurable logic, and chiplet-based approaches helping systems adapt to changing workloads after deployment.

• Spotlights: A reframing of the quantum advantage debate toward definitions and usefulness, and AWS launching a European sovereign cloud with plans to expand its isolated infrastructure footprint across the EU.

• Headlines: Strong AI-driven momentum in semiconductors, renewed debate and progress in quantum advantage and scaling, and major AI data center build-outs from Meta and Microsoft.

• Readings: Semiconductor trends around HBM, NPUs, and secure manufacturing, quantum advances in cooling and defense readiness, progress in photonic modulators, and neuromorphic efficiency gains.

• Funding news: A broad spread of financings across quantum and semiconductors, with only one round below $10M, highlighting sustained mid-stage deal activity.

• Bonus: New U.S. policy efforts to shift a significant share of Taiwan’s chip supply chain to the U.S. and ramp up domestic chip production volumes through investment incentives and targeted tariffs.

This will be my last issue for now as I’m off to new adventures 💔 I’ll continue contributing Deep Dives for the newsletter and interviews for the blog. The amazing Future of Computing team will keep the newsletter active and publish it going forward ❤️

What are systems-on-chips (SoCs)?

Engineers traditionally built systems-on-chips (SoCs), meaning single chips that integrate processors, accelerators, memory interfaces, and I/O, by selecting ASICs (fixed-function chips designed for a specific task), FPGAs (reconfigurable logic that can be rewired after manufacturing), DSPs (processors optimized for signal processing), or general-purpose processors based on known workloads and expected product lifetimes. Once manufactured, these systems were designed around the expectation that their core workloads and requirements would not change significantly.

That design model has weakened. Workloads, especially those shaped by AI, now evolve faster than silicon development cycles. Models change, standards shift, and deployment conditions often remain uncertain long after tape-out. As a result, SoC designers increasingly combine fixed-function logic with programmable or reconfigurable elements to accommodate change after deployment.

Why programmability matters in modern SoCs

Modern SoCs increasingly combine CPUs, GPUs, DSPs, NPUs, and sometimes reconfigurable fabrics. This reflects the difficulty of committing to one optimal architecture when workloads and standards are still in flux.

Programmable components make it possible to update algorithms, reassign workloads, or adapt to new protocols after deployment. In some cases, this flexibility may come from swapping in a programmable chiplet rather than redesigning a full system.

GPUs illustrate this trade-off between flexibility and power efficiency. They are highly programmable, but consume significant power. In embedded AI systems, designers often pair more fixed NPUs with programmable DSPs, balancing NPU efficiency for matrix math with DSP programmability and lower power than GPUs.

“An adaptive SoC with AI engines that integrate DSP capabilities.” Source: AMD/SemiEngineering.

The role of DSPs in programmable SoCs

DSPs illustrate how programmability inside modern SoCs is used to manage variability in real-world signals that can be difficult to account for fully at design time.

Analog interfaces are difficult to fully specify in advance

As SoCs integrate more RF, sensor, and mixed-signal interfaces, they are exposed to noise, distortion, and variability that depend on environment, aging, and interference. These effects are hard to model exhaustively at design time and often change over a product’s lifetime.

DSPs sit closest to real-world signals

DSPs operate at the boundary between analog inputs and digital processing. Because they are programmable and operate in real time, they are well suited to handle adaptive filtering, calibration, and compensation without requiring hardware changes. In some systems, AI-based techniques assist by adjusting to changing conditions such as temperature drift or interference.

This does not imply that AI replaces classical signal processing. Deterministic algorithms remain well suited for tasks like fast Fourier transforms, while AI is applied where adaptivity is more valuable.

Reconfigurable approaches beyond DSPs

Beyond DSPs, designers are exploring coarse-grained reconfigurable arrays, embedded FPGAs, and FPGA-integrated AI engines. These options sit between fixed-function hardware and fully programmable logic, offering additional flexibility with efficiency trade-offs.

Their use depends strongly on ecosystem support, toolchain maturity, and integration with existing design flows, which remain uneven, particularly for newer reconfigurable approaches. As a result, they are generally used as complements rather than replacements.

Chiplets add another layer of flexibility by isolating fast-changing functions into separate components, allowing parts of a system to be updated while others remain stable. Embedded FPGAs offer a similar hedge, but designers weigh them carefully because reconfigurability adds area and cost.

Source: Programmable Chips Evolve For Shifting Needs (SemiEngineering)

⚛️ Quantum advantage has likely been achieved — the debate is over what counts (The Quantum Insider)

“Quantum advantage has likely been demonstrated through multiple large-scale random circuit sampling experiments that perform programmable computational tasks beyond feasible classical simulation, even if those tasks have no practical use.

Scientific skepticism persists largely because the benchmark tasks are contrived, verification relies on indirect proxies and extrapolation, and early experiments were partially matched by later classical simulations.

The debate now centers less on whether quantum devices exceeded classical capabilities and more on whether usefulness and intuitive computational value should be retroactively required for quantum advantage claims.”

☁️ AWS launches AWS European sovereign cloud and announces expansion across Europe (About Amazon)

“Today, Amazon Web Services (AWS) announced the general availability of the AWS European Sovereign Cloud, a new, independent cloud for Europe entirely located within the EU, and physically and logically separate from other AWS Regions.

The AWS European Sovereign Cloud’s unique approach provides the only fully featured, independently operated sovereign cloud backed by strong technical controls, sovereign assurances, and legal protections designed to meet the needs of European governments and enterprises for sensitive data.

AWS also announced plans to extend the AWS European Sovereign Cloud footprint from Germany across the EU to support stringent isolation, in-country data residency, and low latency requirements.”

Related news:

Amazon’s new European sovereign cloud can’t rule out US data access (TrendingTopics.eu)

Amazon’s EU cloud: Disconnected operation not yet tested by BSI (heise)

Last week’s headlines featured strong AI-driven momentum in semiconductor revenues and manufacturing, renewed debate and progress around quantum advantage and scaling, large-scale AI data center build-outs from Meta and Microsoft.

🦾 Semiconductors

Rising AI-Driven Demand for Power ICs and Capacity Cuts Fuels Potential 8-Inch Foundry Price Hikes (TrendForce)

Keysight unveils machine learning toolkit to accelerate device modeling and PDK development (Keysight)

Synopsys enters definitive agreement with GlobalFoundries for sale of processor IP solutions business (Synopsys)

Cadence Delivers Enterprise-Level Reliability with Next-Gen Low-Power DRAM for AI Applications Featuring Microsoft RAIDDR ECC Technology (Cadence)

Wolfspeed Achieves 300mm Silicon Carbide (SiC) Technology Breakthrough (Wolfspeed)

Gartner says worldwide semiconductor revenue grew 21% in 2025 (Gartner)

AI drives semiconductor revenues past $1 trillion for the first time in 2026 (Omdia)

⚛️ Quantum

Honeywell announces Quantinuum has filed confidential paperwork for a possible IPO (The Quantum Insider)

EeroQ breakthrough solves the “wire” problem in quantum computing (PR Newswire)

Standard Model Advances with Irreducible Two-Particle States and Electromagnetic Interaction Correlation (Quantum Zeitgeist)

Toyota & ORCA Achieve 80% Compute Time Reduction Using Quantum Reservoir Computing (Quantum Zeitgeist)

Penn State researchers report quantum hardware exposes new security vulnerabilities (The Quantum Insider)

Welinq sells QDrive quantum memory in Europe (The Quantum Insider)

Physicists outline technique to scale neutral-atom quantum systems beyond 100,000 qubits (The Quantum Insider)

🧠 Neuromorphic

Innatera taps VLSI expert to lower barriers to neuromorphic adoption (EE Times)

Sandia Labs: Neuromorphic computers revolutionize PDE solving efficiency (WebProNews)

💥 Data Centers

SiFive and NVIDIA unveil NVLink Fusion for data center connectivity (SiFive)

Meta establishes ‘Meta Compute,’ plans multiple gigawatt-plus scale AI data centers (Data Center Dynamics)

Microsoft announces glut of new data centers but says it won’t let your electricity bill go up (TechCrunch)

📡 Networking

Expanding 5G connectivity with the Airbus UpNext SpaceRAN demonstrator (Airbus)

🤖 AI

OpenAI signs deal reportedly worth $10 billion for compute from Cerebras (TechCrunch)

Penn State Researchers Report Quantum Hardware Exposes New Security Vulnerabilities. Source: Quantum Insider.

This reading list covers semiconductor trends in HBM, NPUs, and secure manufacturing, quantum advances in cooling and military readiness, photonic modulators for positioning systems, and neuromorphic adoption and efficiency gains.

🦾 Semiconductors

Secure data sharing becoming critical for chip manufacturing (SemiEngineering) (16 mins)

HBM4 sticks with microbumps, postponing hybrid bonding (SemiEngineering) (10 mins)

IEDM 2025 Round-Up (SemiAnalysis) (36 mins)

How and why to optimize NPUs (SemiEngineering) (12 mins)

⚛️ Quantum

Efficient cooling method could enable chip-based trapped-ion quantum computers (MIT News) (13 mins)

The enigma of high-temperature superconductivity still unsolved after 35 years (Quantum Zeitgeist) (12 mins)

Non-equilibrium statistical mechanics: Order from chaos in living systems (Quantum Zeitgeist) (11 mins)

Review: Pentagon falls behind on mapping quantum technology to military needs (The Quantum Insider) (8 mins)

Integrated-photonics-based systems for polarization-gradient cooling of trapped ions (Nature) (54 mins)

⚡️ Photonic

Photonics: Underpinning a Sustainable Future (Photonics.com) (16 mins)

Lithium Niobate Photonic Modulators for Next-Generation PNT (Inside GNSS) (4 mins)

🧠 Neuromorphic

Digital Signal Processing Advances with Neuromorphic FPGA and Reduced Power Consumption (Quantum Zeitgeist) (7 mins)

Fatigue-based learning in memristor-enhanced spiking neural networks (Bioengineer.org) (4 mins)

💥 Data Centers

Is Europe’s AI infrastructure build-out heading for a gigafactory-style bust? (Sifted) (29 mins – Podcast)

Data centers are amazing. Everyone hates them. (MIT Technology Review) (14 mins)

Liquid cooling gains traction in data centers (SemiEngineering) (23 mins)

From Tokens to Burgers: A Water Footprint Face-Off (SemiAnalysis) (9 mins)

Next generation electro-optic modulators using micro transfer printing. Source: Inside GNNS.

Last week’s rounds included several financings in quantum across early and mid stages, alongside mid-stage deals in semiconductors and one data-center round. Only one round came in below $10M.

This bonus section summarizes recent U.S. policy actions and trade measures aimed at reshaping semiconductor supply chains and increasing domestic chip production.

Bringing 40% of Taiwan’s chip supply chain and production to the U.S.

The U.S.–Taiwan trade agreement includes $250B in direct U.S. investments by TSMC and other Taiwanese companies across advanced semiconductors, energy, and AI, plus up to $250B in credit guarantees for additional IC supply chain expansion. Reciprocal tariffs are capped at 15%, with potential Section 232 exemptions for U.S.-based investments.

TSMC is set to expand its $165 billion U.S. investment — here’s what we know (CNBC)

Fact Sheet: Restoring American Semiconductor Manufacturing Leadership Through an Agreement on Trade & Investment with Taiwan (U.S. Department of Commerce)

Ramping up volumes of chips made in the U.S.

The White House announced a 25% tariff on select advanced computing and AI chips, including Nvidia’s H200 and AMD’s MI325X, while excluding chips imported for U.S. data centers, startups, consumer and industrial applications, and public sector use, with further exemptions possible.

Fact Sheet: President Donald J. Trump Takes Action on Certain Advanced Computing Chips to Protect America’s Economic and National Security (The White House)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Photonic quantum computing as a path toward fault-tolerance, explaining why photons are strong qubit candidates, how linear-optical and measurement-based approaches evolved, and recent progress.

• Spotlights: Cloudberry launches Europe’s first semiconductor venture fund, and a clear technical overview explains where 2.5D packaging stands today as interposers, bridges, and cost pressures reshape advanced integration.

• Headlines: Semiconductor manufacturing and edge AI updates, steady progress in quantum error correction and scaling, new momentum in photonics and silicon photonics testing, and major data center expansions.

• Readings: Shifting reliability risks in semiconductors, quantum advances in simulation and scaling, new photonic materials and markets, neuromorphic memory and security systems, and Europe’s data center and cloud constraints.

• Funding news: A small set of rounds dominated by public grants under Canada’s Quantum Champions Program, with very limited venture activity and only two disclosed venture rounds across photonics and analog computing.

• Bonus: QuantumDiamonds brings quantum sensing into semiconductor production, showing how diamond-based magnetic field imaging can enable non-destructive testing of advanced 2.5D and 3D chip packages at scale.

We wish you wonderful holidays and you’ll hear from us in January! 🎄❤️

This week’s deep dive is written by Florian Burger, our first guest writer. Florian worked on single-photon sources in silicon during his PhD at the Max Planck Institute of Quantum Optics and TU Munich. He is now exploring new professional avenues in quantum technologies.

If you would like to contribute as a guest writer, feel free to message Emily Eisenblätter.

Photonic Quantum Computing

Among the physical implementations of quantum computing, photonics is the sleeping giant. Sleeping because most well-known players have zeroed in on superconducting qubits (e.g. IBM, Google and Rigetti) or trapped ions (e.g. IonQ and Quantinuum). A giant nevertheless, given that photonic quantum computing startup PsiQuantum has raised over $2.3 billion, more than any other quantum computing startup and clear evidence of the great hopes placed in the technology.

Photons are ideal qubits – almost

All-optical quantum computers encode quantum information in photons and perform operations directly on these photons. Photons are practically noise-free as they do not interact strongly with each other or with most matter. They have several degrees of freedom such as polarization, frequency, path and time-bin available to physically encode a qubit.

Single photons can be reliably created in a variety of ways and efficiently manipulated using so-called linear optics components such as phase plates and (polarizing) beam splitters–standard components that are found in any optics lab. Single-photon detectors with detection efficiencies >80 % and negligible dark count rates have been commercially available for some years. Photonic integrated circuits (PICs), which can be fabricated using the same mature tools as electronic ICs, enable straightforward scaling of optical quantum computers.

A new paradigm paved the way, but it came with a (photon) price tag

The central difficulty of all-optical quantum computing is to realize entangling gates, e.g. a controlled-NOT (CNOT) gate, as they require two photonic qubits to interact–something photons normally do not do. This is the flip side of the photon’s weak interaction with the environment and a trade-off faced by all physical qubits. In principle, non-linear materials can be used to manipulate one photon conditional on the presence of another photon. However, there is another tradeoff: The stronger the non-linearity, the higher the absorption in the material, leading to photon loss.

Two seminal proposals in 2001 offered a clever workaround:

1. A CNOT gate that only uses linear optics components but requires two additional photons, which are destroyed in the process, and is fundamentally nondeterministic (Knill, Laflamme and Milburn; KLM). This means that the gate only works on average 1/16^th of the time. However, a measurement on the additional two photons makes it possible to determine in which instances it has worked. 

2. A paradigm for quantum computation in which only single-qubit measurements are performed on a so-called cluster state of many entangled qubits, that is prepared beforehand (Raussendorf and Briegel).

These two innovations paved the way for linear optical quantum computing and measurement-based quantum computing (MBQC), respectively. Since 2001 a tremendous amount of work has been done to reduce the photon overhead from roughly 10,000 photons per CNOT gate in initial concepts to around 100 photons today. In 2021, scientists at PsiQuantum proposed another update to the paradigm, called fusion-based quantum computation (FBQC), that increases the threshold of tolerable photon loss to 2.7 %.

Theorists have lowered the hurdles, startups are racing to jump them

These theoretical improvements on the one side and advances in PIC fabrication, packaging as well as single-photon detection on the other have made photonics a serious contender to other quantum computing platforms. Startups such as PsiQuantum and Xanadu keep pushing the envelope by creating CMOS-compatible processes for fabricating photonic quantum processors together with commercial foundries. New players with significant expertise in deterministic single-photon generation such as Quandela and Sparrow Quantum are pushing into the market as efficient sources of indistinguishable photons have been recognized as a key differentiator to achieving fault-tolerance.

These strong players as well as the fundamental advantages of photonic quantum computing such as straightforward scalability, moderate cryogenic requirements and inherent modularization and networking capabilities make photonic quantum computing a technology worth watching in 2026.

Modules of the quantum photonics fabrication process developed by PsiQuantum and GlobalFoundries. Source: PsiQuantum.

^{_{References and further reading: M. A. Nielsen and I. L. Chuang, Quantum Computation and Quantum Information: 10th Anniversary Edition. New York: Cambridge University Press, 2011; J. L. O’Brien, “Optical quantum computing,” Science, vol. 318, no. 5856, pp. 1567–1570, Dec. 2007; E. Knill, R. Laflamme, and G. J. Milburn, “A scheme for efficient quantum computation with linear optics,” Nature, vol. 409, pp. 46–52, Jan. 2001; R. Raussendorf and H. J. Briegel, “A one‑way quantum computer,” Phys. Rev. Lett., vol. 86, no. 22, pp. 5188–5191, May 2001; T. Rudolph, “Why I am optimistic about the silicon‑photonic route to quantum computing,” APL Photonics, vol. 2, no. 030901, Mar. 2017; S. Bartolucci et al., “Fusion‑based quantum computation,” Nat. Commun., vol. 14, Art. no. 912, Feb. 2023; PsiQuantum team, “A manufacturable platform for photonic quantum computing,” Nature, vol. 641, pp. 876–883, May 2025; H. Aghaee Rad et al., “Scaling and networking a modular photonic quantum computer,” Nature, vol. 638, pp. 912–919, Feb. 2025.}}

⚛️ Cloudberry launches Europe’s first semiconductor venture fund (Cloudberry)

“Cloudberry, a venture capital firm based in Helsinki and London, today announced the launch of Europe’s first semiconductor venture fund with an initial close of €30 million. The fund invests in companies advancing the technological frontier with semiconductors, photonics and advanced materials to advance compute, connectivity, sensing and power.”

🦾 What’s Next for 2.5D Packaging? (SemiEngineering)

2.5D packaging is evolving across several paths: more capable silicon interposers and lower-cost alternatives.

• Silicon interposers are getting thicker and more complex, driven by AI, HBM, and wider interfaces. More metal layers improve routing and power delivery but raise cost, warpage, and yield challenges.

• Active interposers are emerging, integrating power management, signal conditioning, memory, or even photonics. They enable tighter integration but significantly increase cost, test complexity, and yield risk.

• Organic and glass interposers aim to reduce cost. Organic options are advancing but struggle with fine pitches and HBM integration. Glass is promising but likely post-2027.

• Silicon bridges are intended to reduce cost by replacing full silicon interposers, but assembly alignment and yield challenges have so far prevented these savings from materializing.

Bottom line: Silicon interposers still dominate today. Cost pressure is pushing the ecosystem toward organic materials and bridges, but yield and integration challenges must be solved before they can scale.

We recommend this reading for a clear, technical overview of where 2.5D packaging stands today and which constraints will matter most going forward.

Last week’s headlines featured semiconductor manufacturing tools and edge AI updates, steady progress in quantum error correction and scaling, new activity in photonics and silicon photonics testing, major data center expansions and strategy shifts, sovereign cloud debates in Europe, and fresh moves in AI models and funding.

🦾 Semiconductors

Nvidia is reportedly weighs ramping up H200 production to meet surging demand in China (TechCrunch)

Toshiba to accelerate semiconductor design innovation with Siemens’ EDA software (Siemens)

Vishay Intertechnology Introduces Thin Film Chip Fuses With Fast and Very Fast Acting Performance (Vishay Intertechnology)

Lattice enhances sensAI solution stack with edge AI performance, efficiency, and ease of use (Lattice Semiconductor)

Rigaku launches ONYX 3200 for Semiconductor Manufacturing (Rigaku)

Rapidus announced new AI-agentic design tools optimized for its 2nm manufacturing process (Rapidus)

⚛️ Quantum

Riverlane hardware decoder enables real-time quantum error correction (The Quantum Insider)

IonQ study finds linked quantum computers can beat bigger single systems (The Quantum Insider)

SQC study shows silicon-based quantum processor can scale without loss of fidelity (The Quantum Insider)

Xanadu Fault Tolerant Quantum Algorithms For Cancer Therapy (Quantum Zeitgeist)

Quantum technology signals new frontier for the gaming industry (The Quantum Insider)

⚡️ Photonic

LLNL researchers break speed-scale barriers in 3D nanofabrication with new meta-optics platform (Lawrence Livermore National Laboratory)

AOI Introduces New Ultra High-Power Semiconductor Laser to Support Silicon Photonics and CPO (AOI)

NTT Tests Optical Switching to Manage Data Center Loads (IEEE Spectrum)

Quantum Computing Inc. CEO Huang to Lead $40M-Funded Photonics Roadmap (Quantum Zeitgeist)

FormFactor acquires Keystone Photonics to boost silicon photonics testing (Investing.com)

💥 Data Centers

NTT gains council approval for 482 MW data center campus in Nierstein, Germany (Data Center Dynamics)

Oracle says it might let customers bring their own hardware into its data centers (Data Center Dynamics)

PIMCO closes record-breaking European data center fund (PERE News)

Qualcomm’s Strategic Pivot: Data Center Ambitions Take Center Stage (ad-hoc-news)

☁️ Cloud

Airbus is looking for a sovereign EU cloud (heise)

SAP Leads the Way in Sovereign Cloud (SAP)

🤖 AI

Amazon reportedly in talks to invest $10B in OpenAI as circular deals stay popular (TechCrunch)

Nvidia bulks up open source offerings with an acquisition and new open AI models (TechCrunch)

NVIDIA debuts Nemotron 3 family of open models (NVIDIA)

OpenAI is reportedly trying to raise $100B at an $830B valuation (TechCrunch)

Features of the ONYX 3200, a semiconductor metrology system by Rigaku. Source: Rigaku.

This reading list covers shifting reliability risks in semiconductors, quantum breakthroughs in simulation and scaling, new materials in photonics, neuromorphic memory and security systems, Europe’s data center constraints, and cloud and AI market projections.

🦾 Semiconductors

Reliability risks shift to the materials stack (SemiEngineering) (21 mins)

Global Semiconductor Equipment Sales Projected a Record of $156 Billion in 2027 (SEMI) (13 mins)

Global Pure Foundry Market Share: Quarterly (Q3 2025) (Counterpoint Research) (5 mins)

⚛️ Quantum

Inside SQC’s research on a key quantum scaling problem (The Quantum Insider) (9 mins)

NISQ Computers Achieve Excited-State Calculations for Challenging Condensed Matter Problems (Quantum Zeitgeist) (12 mins)

Quantum Monte Carlo Library Achieves Highly Accurate Electronic Structure (Quantum Zeitgeist) (7 mins)

⚡️ Photonic

PI’s latest 6-axis alignment system, PICs, and photonics wafer probing (EngineerLive) (3 mins)

New material on the block: Barium titanate for silicon photonics (Laser Focus World) (9 mins)

Silicon Photonics Market Size – By Product, By Component, and By Application, Growth Forecast, 2026 – 2035 (Global Market Insights) (3 mins)

🧠 Neuromorphic

Hybrid GNN–LSTM defense with differential privacy and secure multi-party computation for edge-optimized neuromorphic autonomous systems (Nature Scientific Reports) (57 mins)

Accelerated Training Enables Neuromorphic Photonic Computing for Arbitrary Memory Pattern Classification (Quantum Zeitgeist) (12 mins)

Ion-doped organic transistors power neuromorphic memory systems (Bioengineer.org) (5 mins)

Neuromorphic computing meminductor achieves replicating amoeba behaviour with charge-dependent inductance (Quantum Zeitgeist) (12 mins)

💥 Data Centers

What Ireland’s Data Center Crisis Means for the EU’s AI Sovereignty Plans (AlgorithmWatch) (24 mins)

Amazon data centers aren’t raising your electricity bills—Here’s the data (About Amazon) (12 mins)

☁️ Cloud

Cloud market: Gartner forecasts trillion US dollars by 2027 (heise) (10 mins)

🤖 AI

From experiment to infrastructure: what’s next for AI? (Sifted) (5 mins)

The AI Kill Switch: Dangerous Chinese Open Source (CEPA) (8 mins)

Neuromorphic photonic system that stores and classifies patterns using light scattering in a disordered medium. Source: Quantum Zeitgeist.

Last week included a small set of rounds, with most activity coming from grants under Canada’s Quantum Champions Program. Venture activity was limited, with only two disclosed venture rounds, one in photonics and one larger round in analog computing.

QuantumDiamonds develops quantum-sensing-based semiconductor inspection systems for advanced chip testing and is now scaling this technology through a planned €152M production facility in Munich.

Technology

Its QDM systems use nitrogen-vacancy (NV) centers in diamond, atomic-scale defects that act as quantum sensors for magnetic fields, to detect magnetic fields created by electrical currents flowing inside semiconductor devices and advanced chip packages. Because electrical currents generate magnetic fields, this allows the systems to trace where current flows inside a chip non-destructively, meaning the package does not need to be opened. The measurements are performed with micrometer-scale spatial precision and within seconds, even in complex 2.5D and 3D architectures such as through-silicon vias (TSVs), microbumps, and chiplets. This provides layer-specific insight into current paths in advanced packages that are difficult to access with conventional testing approaches.

Traction

QuantumDiamonds has completed proof-of-concept projects with 9 of the 10 largest chip manufacturers globally, with initial deployments in Europe and further installations planned for Q1 2026 in the United States and Taiwan.

Production Facility

The company announced a €152M investment plan to establish the world’s first production facility for advanced quantum-based chip testing systems in eastern Munich. The site is expected to receive tens of millions of euros in public support from the German federal and Bavarian governments under the European Chips Act. The facility supports the transition from research and pilot deployments to global production and is positioned as a strategic asset within Europe’s semiconductor ecosystem.

Last week, we highlighted a paper from QuantumDiamonds presenting their first real-world demonstration of quantum diamond microscopy on an advanced InFO-PoP chip failure, which may also be of interest in this context.

“QDm.1: The Flagship Quantum Diamond Microscope for Failure Analysis”. Source: QuantumDiamonds.

Sources: QuantumDiamonds – About Us (QuantumDiamonds), QD Plans €152 Million Investment in Next-Gen Quantum-Based Chip Inspection Facility in Munich, Germany (The Quantum Insider)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Breaking the Memory Wall Pt. 3 focuses on manufacturing constraints in advanced memory, showing how metrology, inspection limits, and buried defects now gate further scaling of 3D NAND.

• Spotlights: Unconventional AI raises a $475M seed round to explore biologically inspired analog computing, while Nvidia-backed Starcloud trains an AI model in orbit, highlighting new directions in compute deployment.

• Headlines: Updates across semiconductors and edge AI, continued momentum in quantum and photonics, advances in neuromorphic hardware, expanding data center infrastructure, and new developments in cloud, networking, and AI.

• Readings: Record semiconductor revenues, advances in quantum photonics and diamond-based devices, real-time neuromorphic processors, liquid-cooled data centers, and the growing role of industrial and data cloud infrastructure.

• Funding news: A compact set of rounds spanning quantum, neuromorphic computing, semiconductors, and data centers, with deal sizes ranging from €2M to $475M and no clear concentration in a single category.

• Bonus: Technologies unveiled at IEDM 2025 highlight progress in HBM thermals, monolithic 3D integration, compute-in-memory devices, advanced lithography, silicon photonics, and automotive AI processors.

3D NAND scales by stacking memory cells vertically

For more than a decade, 3D NAND (the dominant non-volatile memory technology used in solid-state drives across data centers, PCs, and mobile devices) has scaled by adding more layers on top of each other. Each new generation increases bit density by roughly 30%, with current chips reaching terabit-scale capacity per die.

From the outside, this looks like a straightforward continuation of vertical scaling. While patterning and deposition are challenging, the ability to measure and verify deep, buried structures also increasingly limits how aggressively 3D NAND can scale.

As stacks grow taller, precision becomes more critical

Modern 3D NAND relies on drilling extremely narrow vertical holes through stacks that can be several microns tall. These holes are well below 100 nm in diameter and must remain almost perfectly vertical from top to bottom. Any bowing, tapering, or misalignment can cause electrical interference between cells, making higher-density storage modes like QLC and PLC (quad-level cell and penta-level cell NAND, where each memory cell stores four or five bits by using multiple voltage levels) unreliable.

Most yield-critical defects are buried inside the memory stack

The challenge is that the most critical defects are buried. They occur inside the stack, not on the surface. Traditional inspection tools were designed to examine flat, easily accessible features. In 3D NAND, many yield-limiting defects sit several microns below the surface and cannot be detected with conventional electron-beam or atomic-force–based inspection techniques.

Metrology requires multiple, system-level inspection methods

As a result, metrology for 3D NAND has become a multi-modal problem. Manufacturers combine several complementary techniques, each compensating for the blind spots of the others:

• Infrared optical metrology (IRCD) uses longer wavelengths of light that can penetrate deeper into stacked oxide and nitride layers, allowing indirect measurement of vertical feature profiles at high throughput.

• High-energy electron-beam inspection uses higher landing energies so electrons can reach several microns into deep features and detect buried defects such as residual metal or voids.

• X-ray inspection and X-ray CT allow non-destructive imaging of buried structures and alignment across tall stacks, where optical and electron-beam techniques struggle.

• Acoustic microscopy is used after wafer bonding to detect voids or other bonding-related defects at the interface between the NAND memory array and the underlying logic die.

None of these tools alone is sufficient. Yield depends on correlating partial, indirect signals across multiple inspection methods.

Limited visibility increases reliance on virtual metrology

A second, less visible shift is the growing role of virtual metrology. Manufacturers increasingly rely on process simulation and virtual fabrication to predict where defects are likely to occur and to determine how aggressively real wafers need to be sampled. This helps reduce trial-and-error during development without replacing physical measurement.

“Key features in 3D NAND include tiny memory holes, slits, staircase contacts, and peripheral contacts.” Source: Lam Research/SemiEngineering.

Source: Metrology digs deep to produce next-generation 3D NAND (SemiEngineering)

Unconventional AI raises $475M seed at $4.5B valuation just 2 months after launch (TechFundingNews)

“Barely two months after launch, Unconventional AI has secured a $475 million seed round at a valuation of $4.5 billion. The round was co-led by Andreessen Horowitz and Lightspeed Venture Partners, with participation from Lux Capital, DCVC, Databricks and Amazon founder Jeff Bezos.

[...]

Unconventional AI is exploring ideas rooted in biology, where energy is a scarce resource and efficiency is essential. The human brain, for example, performs extraordinary computation while consuming only about 20 watts, a far cry from today’s power-hungry AI systems.

The startup is investigating how biological principles and the analogue foundations of computing might translate into processors that harness the inherent physics of semiconductors rather than brute-force digital switching.”

💥 Nvidia-backed Starcloud trains first AI model in space as orbital data center race heats up (CNBC)

“Washington-based Starcloud launched a satellite with an Nvidia H100 graphics processing unit in early November, sending a chip into outer space that’s 100 times more powerful than any GPU compute that has been in space before.

Now, the company’s Starcloud-1 satellite is running and querying responses from Gemma, an open large language model from Google, in orbit.”

Read more about Starcloud in our recent interview!

Last week’s headlines featured new semiconductor and edge AI hardware, momentum in quantum and photonics, advances in neuromorphic chips, expanding data center infrastructure, and updates across cloud, networking, and AI.

🦾 Semiconductors

China’s CSPs and OEMs likely to Actively Procure H200, but Domestic AI Chip Development Continues to Accelerate (TrendForce)

Advantest Unveils T2000 AiR2X Air-Cooled SoC and Power Analog Test Solution (Advantest)

Advantest Introduces Next-Generation M5241 Memory Handler to Support High-Performance AI Memory Devices (Advantest)

Fujifilm Launches “ZEMATES™” – a New Brand of Photosensitive Insulating Materials Enhancing Reliability in Semiconductor Packaging (Fujifilm)

Infineon extends the CoolSiC™ MOSFET 750 V G2 family featuring ultra-low RDS(on) and new packages (Infineon)

DEEPX Launches DX-H1 V-NPU: The 30W Single-Card Solution That Challenges GPU Dominance (PR Newswire)

Nvidia is reportedly testing tracking software as chip smuggling rumors swirl (TechCrunch)

⚛️ Quantum

Einride and IonQ partnership uses quantum computing to optimize the logistics of electric and autonomous freight (The Quantum Insider)

Google Opens Its Advanced Willow Chip to UK Researchers in Search For Practical Uses (The Quantum Insider)

MicroAlign Breakthrough: From 12 to 24-Channel High Accuracy Fiber Arrays for Quantum Photonic Computing (MicroAlign)

QuantWare announces scaling breakthrough with VIO-40K™, delivering 10,000 qubit Quantum Processors for the first time (QuantWare)

Imec successfully integrates colloidal quantum dot photodiodes (QDPDs) on metasurfaces developed on 300mm CMOS wafers (imec)

How Fujitsu Is Tackling a 10,000-Qubit Quantum Computer for Practical Applications (The Quantum Insider)

Quantum Corridor, Toshiba Demonstrate Cross-State Quantum Key Distribution Over Live Commercial Metro Fiber Network (The Quantum Insider)

⚡️ Photonics

Taiwan’s UMC to mass-produce imec's silicon photonics technology (Optics.org)

Photonics21 Leads Call for €2 Billion Photonics Program in EU’s Framework (Optica OPN)

Ayar Labs and yieldWerx Partner to Streamline Photonics Test Data Analytics, Delivering Measurable Results in Just 30 Days (PR Newswire)

Hamamatsu Photonics Develops “HyperGauge® In-plane Film Thickness Meter” Achieves Full-Surface Measurement of 300 mm Wafers in Just 5 Seconds (Hamamatsu Photonics)

Photonics suppliers dominate Taiwan's semiconductor growth rankings on CPO momentum (DigiTimes)

PI launches NanoCube 6-axis piezo platform for photonics (Design World)

🧠 Neuromorphic

Lancaster spinout Quinas Technology launches ULTRARAM™ memory technology project with Innovate UK (Lancaster University)

Yale: Team develops chips that act like brains and makes them scalable (TechXplore)

Korea ranks second globally in neuromorphic chip patent growth (Communications Today)

💥 Data Centers

Siemens and nVent to release joint reference architecture purpose-built for NVIDIA AI data centers (Siemens)

Taiwan unveils national cloud center amid global AI race (Evrim Ağacı)

Opt-In NVIDIA Software Enables Data Center Fleet Management (NVIDIA)

☁️ Cloud

US Authorities Have Far-Reaching Access to European Cloud Data (Heise)

PowerBank Announces Launch of the First Satellite in the “Orbital Cloud” Project with Smartlink AI (PowerBank Corp.)

New Relic Deepens AWS Alliance to Pioneer Autonomous Cloud Operations (Ad-hoc News)

Google Cloud Demonstrates Massive Kubernetes Scale with 130,000-Node GKE Cluster (InfoQ)

📡 Networking

Copper exchanges in all shapes and sizes (Data Center Dynamics)

🤖 AI

CoreWeave CEO defends AI circular deals as working together (TechCrunch)

Dashboard to provide insights on data center fleet. Source: Nvidia.

This reading list covers record semiconductor revenues, quantum advances in photonics and diamond transistors, real-time neuromorphic chips, liquid-cooled data centers, and the rise of industrial and data cloud infrastructure.

🦾 Semiconductors

Semiconductor quarterly revenue surpasses $200bn for the first time as industry-wide growth accelerates (Omdia) (8 mins)

AI-driven collaboration in chip manufacturing (SemiEngineering) (9 mins – Video)

Chiplets vs. Soft IP: Different in Almost Every Way (SemiEngineering) (24 mins)

AI buildout makes HPC simulation more challenging (SemiEngineering) (18 mins)

⚛️ Quantum

Multi-billion market at the intersection of materials and quantum tech (IDTechEx) (12 mins)

New photonic techniques aim to break three longstanding barriers to quantum scale (The Quantum Insider) (12 mins)

Quantum Transistors on Diamond Processors Achieve 99.9988% Fidelity (The Quantum Insider) (6 mins)

What Is the Price of a Quantum Computer in 2025? (The Quantum Insider) (8 mins)

Quantum Diamond Microscopy for Non-Destructive Failure Analysis of an Integrated Fan-Out Package-on-Package iPhone Chip (arXiv) (35 mins)

The paper was published by researchers from the startup Quantum Diamonds.

⚡️ Photonic / Optical

Gigahertz-frequency acousto-optic phase modulation of visible light in a CMOS-fabricated photonic circuit (Nature Communications) (67 mins)

🧠 Neuromorphic

Neuromorphic Processor with Universal Interconnections Implemented on FPGA Enables Real-Time Inference and Experimentation (Quantum Zeitgeist) (9 mins)

Neuromorphic Chips: Could Memory Chips Make Relationships With Humanoids a Reality? (SK hynix) (11 mins)

Neuromorphic Chip Market to Reach USD 2.3 Billion by 2034 (openPR) (5 mins)

💥 Data Centers

Liquid cooling: the future of data center architecture and operations (Data Center Dynamics) (10 mins)

Data center cooling market surges to USD 34.12 billion by 2033, propelled by 10.3% CAGR (PR Newswire) (4 mins)

☁️ Cloud

AWS re:Invent 2025: How the industrial cloud is becoming physical (ARC Advisory Group) (13 mins)

Dec 2025: What’s new with Google Data Cloud (Google Cloud) (5 mins)

📡 Networking

Configuring data center networks with confidence (Nokia) (7 mins)

Block diagram of the FPGA-based spiking neural network processor. Source: Quantum Zeitgeist.

Last week’s rounds covered a mid-sized set of deals across quantum, neuromorphic, semiconductors, and data centers, with a wide spread in deal sizes, ranging from €2M to $475M. The $25M Series A1 for Corintis is included here as well, as we missed it in last week’s overview.

The IEEE International Electron Devices Meeting (IEDM) took place this week in San Francisco, with a strong focus on advanced logic, AI efficiency, memory technologies, quantum devices, thin-film transistors, and silicon photonics. Selected highlights include:

• HBM-on-GPU thermals: imec showed that co-optimization and system-level thermal mitigation can significantly reduce peak GPU temperatures under realistic AI training workloads.

• Monolithic 3D integration: CEA-Leti’s FAMES Pilot Line demonstrated fully functional 2.5 V SOI CMOS devices fabricated at 400 °C, addressing a key constraint for large-scale 3D sequential integration.

• Compute-in-memory devices: Georgia Tech and TSMC presented monolithic 3D capacitive memory architectures targeting compute-in-memory.

• Advanced lithography and patterning: imec reported wafer-scale fabrication of solid-state nanopores using EUV lithography, while DNP demonstrated a nanoimprint lithography template with 10 nm line-pattern resolution.

• Beyond-CMOS and RF platforms: Progress was reported on 2D-material devices through collaborations involving TSMC, imec, and Intel, alongside AlN-based high-frequency transistors by NTT.

• HBM packaging standards: JEDEC is developing the SPHBM4 specification, which reuses HBM4 DRAM dies but replaces the silicon interposer with an interface base die compatible with standard organic substrates, targeting equivalent bandwidth via 512 data signals and 4:1 serialization.

• Automotive AI compute: Rivian announced an in-house 5 nm processor designed for vision-centric physical AI based on an Arm Cortex-A720AE v9 CPU, alongside an autonomy platform built around an end-to-end training data loop.

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: AWS Trainium3 enters the market as a credible challenger, outlining new compute, memory, and interconnect designs alongside a maturing software stack aimed at lowering the cost of large-scale training and inference.

• Spotlights: Marvell accelerates optical connectivity with its acquisition of Celestial AI, and Moore Threads (often described as “China’s Nvidia”) surges in its market debut amid growing domestic chip ambitions.

• Headlines: Semiconductor updates from UMC, Infineon, and Merck, a broad set of quantum hardware and cloud advances, progress in photonic and neuromorphic platforms, and major AI data center and cloud initiatives.

• Readings: Semiconductor supply-chain and lifecycle security themes, new developments in quantum communication and compilation, and advances in photonic memory and spiking networks.

• Funding news: A week with a high number of rounds, all above $20M, across semiconductors, quantum, photonics, data centers, and cloud, creating an unusual absence of small early-stage checks.

• Bonus: Europe advances a €20B plan for sovereign AI Gigafactories, signaling a coordinated push to expand hyperscale compute capacity for frontier-model development and scientific workloads.

Last week, AWS has introduced Trainium3, a new generation of its custom AI accelerator that aims to compete not on raw peak FLOPs alone but on performance per total cost of ownership. Trainium3 is designed around clear goals: faster time to market, lower cost per model, and an open software ecosystem that extends beyond AWS’s internal workloads.

Trainium3 improvements on Trainium2

Performance and efficiency improvements

- Compute performance: Up to 4.4× higher
- Memory bandwidth: Almost 4× higher
- Energy efficiency: 4× greater

Built on TSMC’s 3 nm N3P process, Trainium3 benefits from higher clocks and lower power consumption. AWS also redesigned the interconnect fabric, which is crucial for large models that are limited by cross-chip communication.

Rack-scale architecture improvements

- NL32x2 (air cooled): two racks, 64 chips total.
- NL72x2 (liquid cooled): two racks, 144 chips total.

Both designs move from the 2D and 3D torus topologies of Trainium2 to a switched scale-up fabric. This shift supports the communication patterns used in modern MoE architectures, where all-to-all collectives become dominant.

AWS’s TCO-first approach to scaling Trainium3

Total cost of ownership (TCO) refers to the combined cost of hardware, deployment, power, cooling, and operational overhead over the lifetime of a system. Trainium3 is designed around lowering these costs by enabling faster rollout, and reduced infrastructure requirements.

Hardware scaling approach

- Air-cooled racks allow deployment in legacy facilities.
- Cableless trays reduce assembly time and potential failure points.
- Multiple generations of switches provide supply chain resiliency.
- Redundant fabric lanes reduce downtime and simplify serviceability.

Software scaling approach

AWS is shifting its software stack from a weakness to a priority by rolling out a native PyTorch backend, open sourcing its compiler and kernel libraries, and improving performance tooling. This makes Trainium3 easier to adopt for mainstream ML teams and reduces the gap to CUDA workflows.

AWS as potential challenger to NVIDIA

Trainium3 is most competitive where throughput per dollar, energy efficiency, and large-scale deployment matter more than peak precision. Early customers report up to 50% lower training and inference costs. While it does not replace Nvidia for all workloads, it offers a credible alternative for cost-sensitive, large-cluster AI infrastructure and strengthens AWS’s position in frontier-scale compute.

Trainium3 also reduces some of the software friction that previously made it difficult to adopt alternatives to CUDA-based workflows. With its PyTorch-native backend, open-source compiler and kernel libraries, and expanded rack-scale systems, it lowers several practical barriers to integrating non-CUDA accelerators. These changes strengthen AWS’s position as a viable option for teams seeking diversity in their large-scale AI infrastructure.

Trainium Chip Roadmap by AWS. Source: SemiAnalysis.

Source: AWS Trainium3 Deep Dive | A Potential Challenger Approaching (SemiAnalysis)

⚡️ Marvell to Acquire Celestial AI, Accelerating Scale-up Connectivity for Next-Generation Data Centers (BusinessWire)

Marvell is acquiring Celestial AI to accelerate the shift from copper to all-optical interconnects in next-generation AI data centers. As systems move to multi-rack, any-to-any scale-up architectures, limitations in electrical links are driving a transition to optical I/O, not only between racks but also within systems and inside packages.

Celestial AI’s Photonic Fabric enables optical connectivity directly into XPUs via co-packaged chiplets, with more than 2× the power efficiency of copper, nanosecond-class latency, excellent thermal stability, and up to 16 Tb/s per chiplet.

The acquisition expands Marvell’s connectivity portfolio, and Celestial AI is already engaged with hyperscalers planning to use its technology. Marvell will acquire the company for approximately $3.25B upfront, plus up to $2.25B in contingent earnout.

🦾 Chinese challenger to Nvidia surges 425% in market debut (Financial Times)

Moore Threads, a Beijing-based chip company founded in 2020 by a former Nvidia executive, soared 425% on its Shanghai Star Market debut after raising $1.1B. The jump reflects confidence in China’s push to build domestic AI chips after US restrictions on Nvidia.

Still, Bernstein expects Moore Threads to generate about $58M in chip sales this year, far below Huawei and Nvidia at roughly $10B each. Nvidia’s China market share is projected to drop from 40% in 2025 to 8% next year.

The company shifted manufacturing from TSMC to SMIC after being added to the US entity list. Its IPO is part of a broader wave of upcoming Chinese AI chip listings.

Last week’s headlines featured new semiconductor moves from UMC, Infineon, and Merck, a broad wave of quantum updates, advances in photonics and neuromorphic tech, major data center and cloud initiatives, and several new AI announcements.

🦾 Semiconductors

300-mm Ultrathin Wafer Handling: Presentation Highlights High-Temperature-Stable Temporary Bonding and IR Laser Debonding with Si Carriers (Brewer Science)

Certus Semiconductor adopts AI-powered Solido to accelerate IO library, analog IP and ESD development (Siemens)

UMC and Polar Collaborate to Meet Growing Demand for U.S. Onshore Semiconductor Manufacturing (UMC)

U.S. International Trade Commission rules in favor of Infineon in one patent infringement case against Innoscience (Infineon)

Merck KGaA Inaugurates Semiconductor Solutions Site in Taiwan to Support AI Growth (Merck KGaA)

Team Invents New Thin Film Materials Based on Nobel Prize Winning Methods (University of Houston)

⚛️ Quantum

D-Wave Announces Formation of U.S. Government Business Unit (The Quantum Insider)

First Successful Proof Of Quantum Teleportation Between Two Different Quantum Dots (The Quantum Insider)

Pasqal Brings Neutral-Atom QPUs to Scaleway’s Quantum Cloud (The Quantum Insider)

Voyager and Infleqtion Partner to Launch Quantum Era in Space (The Quantum Insider)

One Way or Another: UCLA Researchers Report On-Chip Diode Could Simplify Quantum Processor Architecture (The Quantum Insider)

Insider Data Trends Show Quantum Entering Industrial Deployment (The Quantum Insider)

AI Is Emerging as Quantum Computing’s Missing Ingredient, NVIDIA-Led Research Team Asserts (The Quantum Insider)

⚡️ Photonics

Lightmatter Aims to Leapfrog I/O Limitations with 3D Photonic Interconnect (HPCwire)

Voyant Photonics expands Carbon LiDAR platform with chip-scale sensing (GPSWorld)

Coherent expands silicon carbide platform with 300 mm capability to support growing demand of AI and datacenters (Coherent)

Array demonstrates path to photonic Ising computers (AIP)

🧠 Neuromorphic

Innatera and 42 Technology partner to advance neuromorphic edge AI (New Electronics)

ACL Digital and AIM Future deal pushes neuromorphic AI deeper into the edge (EdgeIR)

💥 Data Centers

From heat waste to heat source: Power Mining launches shipping-container data centres for city heating (Tech.eu)

Amazon challenges competitors with on-premises Nvidia ‘AI Factories’ (TechCrunch)

Palantir teams with Nvidia, CenterPoint Energy for software to speed up AI data center construction (Reuters)

Google CEO Sundar Pichai says we’re just a decade away from a new normal of extraterrestrial data centers (Fortune)

☁️ Cloud

All the biggest news from AWS’ big tech show re:Invent 2025 (TechCrunch)

AWS and Google Cloud collaborate on multicloud networking (Google Cloud)

EU digital ministers push against cloud-sovereignty definition that would block US providers (Euractiv)

📡 Networking

Keysight Introduces New Handheld Analyzer Enabling 120-MHz IQ Streaming for Gap-Free Signal Capture (Keysight)

🤖 AI

AWS doubles down on custom LLMs with features meant to simplify model creation (TechCrunch)

Mistral closes in on big AI rivals with Mistral 3 open weight frontier and small models (TechCrunch)

Snowflake and Anthropic Announce $200 Million Partnership to Bring Agentic AI to Global Enterprises (Snowflake)

Superconducting diode design that sends signals one way and enables directional qubit interactions. Source: Quantum Insider.

This reading list covers overseas fab strategies and lifecycle security in semiconductors, long-range quantum key distribution, advances in photonic memory and spiking networks, and scalable neuromorphic processors.

🦾 Semiconductors

TSMC Overseas Fabs – A Success? (SemiAnalysis) (54 mins)

3D-printed chip packages could supercharge semiconductor manufacturing (University of Texas) (7 mins)

Interactive U.S. Semiconductor Ecosystem Map (Semiconductors.org) (15 mins)

Harnessing silicon lifecycle management for chip security (SemiEngineering) (18 mins)

Benefits and Challenges of Using Chiplets (SemiEngineering) (14 mins – Video)

⚛️ Quantum

Decoy-state Quantum Key Distribution Achieves Positive Secret Key Rates over 227 km with Telecom Single-Photon Source (Quantum Zeitgeist) (16 mins)

Exploiting Movable Logical Qubits Enables Reduced Circuit Depth for Lattice Surgery Compilation in Quantum Computation (Quantum Zeitgeist) (13 mins)

⚡️ Photonics

Photonic memory moves closer to practical deployment (Optics.org) (12 mins)

Photonic compute-in-wire: remotely driven photonic deep neural network with single nonlinear loop (EurekAlert!) (16 mins)

Photonic Spiking Neural Network Achieves 90% Pattern Classification with Lightweight Hardware and 80.5% Efficiency (Quantum Zeitgeist) (13 mins)

Enhanced photonic time crystals, temporal exceptional points for optical sensing (Quantum Zeitgeist) (12 mins)

The Weird Hybrid Material That Could Turbocharge Photonic Computing (SciTechDaily) (4 mins)

🧠 Neuromorphic

Risc-v Cores and Neuromorphic Arrays Enable Scalable Digital Processors for EdgeAI Applications (Quantum Zeitgeist) (7 mins)

Neuromorphic Computing Market Is Growing at a CAGR of 18.12% (openPR) (15 mins)

Loihi 2 Neuromorphic Hardware Enables Autonomous Robot Control with Reinforcement Learning and Spiking Neural Networks (Quantum Zeitgeist) (18 mins)

💥 Data Centers

New Data Center Developments: December 2025 (DataCenterKnowledge) (15 mins)

🤖 AI

Guided learning lets "untrainable" neural networks realize their potential (MIT CSAIL) (8 mins)

Comparison of neuromorphic chips and the scalable SpiNNaker system, illustrating how core arrays can grow from single chips to million-core processors. Source: Quantum Zeitgeist.

Last week brought a broad mix of rounds across the stack, with most deals landing at the Seed and Series A stages, concentrated in semiconductors. Notably, all disclosed amounts were above $20M, creating a week with no typical early-stage small checks.

The European Commission has approved a new Memorandum of Understanding (MoU) with the EIB and EIF that kicks off work on four to five AI Gigafactories. These facilities are planned as large, energy-efficient compute hubs for training frontier models and enabling advanced scientific research.

The MoU gives practical momentum to the €20B InvestAI initiative announced earlier this year and shows that Europe is serious about expanding its own hyperscale AI infrastructure. A formal call to select the Gigafactory locations and consortia will follow once the EuroHPC regulation update is completed.

Memorandum of Understanding on AI Gigafactories (European Commission)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: NVIDIA’s three-computer system for Physical AI, showing how dedicated training, simulation, and runtime platforms combine hardware, system software, and models to build and deploy real-world robotic intelligence.

• Spotlights: Firgun Ventures launches a $250M fund focused on early growth-stage quantum companies, and a deep dive on the energy economics of inference.

• Headlines: Semiconductor updates from SK hynix, TSMC, and imec, quantum networking and national initiatives, progress in photonic and neuromorphic hardware, and major AI data center and cloud projects.

• Readings: Open chiplet and lifecycle approaches in semiconductors, quantum insights and investment outlooks, nonlinear photonic architectures, and neuromorphic systems for sensing and time synchronization.

• Funding news: A quieter week concentrated in early-stage activity, with most financings in photonics and additional rounds in semiconductors and quantum, reflecting a pause in larger late-stage deals.

• Bonus: Google’s accelerated TPU commercialization shows how diversified buyers and large-scale deployments could meaningfully challenge Nvidia’s dominance in AI compute.

Why Physical AI Is a Computing Challenge

Physical AI is not only a robotics story. It is a computing story at its core. As we outlined in our explainer on the emerging challenges of building hardware for Physical AI, bringing intelligence into real-world environments is redefining compute design, power efficiency, sensor integration, and verification workflows. Physical AI systems need hardware that can understand 3D environments, process multimodal data in real time, and operate reliably under strict latency and safety constraints.

To support this shift, NVIDIA organizes the development pipeline for physical AI around three distinct computers (each combining hardware, system software, and models):

1) one for training,
2) one for simulation and synthetic data generation,
3) and one for on-robot inference.

Together, these systems form a full stack for building, testing, and deploying robotic intelligence.

NVIDIA’s Three Computers for Physical AI

Each tier serves a specific purpose, provides dedicated hardware or software, and passes a defined output to the next stage of the pipeline.

Tier 1: Training Computer

Purpose: Enable large-scale training of robot foundation models for multimodal perception, language reasoning, and policy learning. Models must learn to understand objects, environments, and actions across diverse data modalities.

Architecture:

Hardware
- NVIDIA DGX systems provide the compute backbone for model training

Software and Models
- NVIDIA Cosmos open world foundation models
- NVIDIA Isaac GR00T humanoid robot foundation models

Developers can pre-train models from scratch on DGX or fine-tune Cosmos and GR00T for robot-specific tasks.

Output: A pre-trained or post-trained robotic foundation model ready for validation, testing, and refinement through simulation.

Tier 2: Simulation and Synthetic Data Computer

Purpose: Enable scalable simulation and synthetic data generation to support policy learning and robust validation of robot behavior when real-world data is limited, costly, or unsafe to collect.

Architecture:

Hardware
- NVIDIA RTX PRO Servers powering Omniverse-based simulation workloads

Software and Models
- NVIDIA Omniverse for physically based simulation
- NVIDIA Isaac Sim for robotics simulation
- NVIDIA Isaac Lab for reinforcement and imitation learning
- NVIDIA Cosmos for synthetic perception data

These systems allow developers to generate training data and validate robot policies across diverse environments and edge cases before real-world deployment.

Output: A validated robot policy tested across simulated scenarios and ready for real-time deployment on physical hardware.

Tier 3: Runtime Computer

Purpose: Enable real-time onboard inference for perception, reasoning, motion planning, and control. Robots must process sensor data, understand their environment, and act within milliseconds while operating under tight power and size constraints.

Architecture:

Hardware
- NVIDIA Jetson AGX Thor as the onboard AI compute system for real-time processing

Software and Models
- Runtime models for perception, control, and language
- Multimodal inference frameworks for robot decision-making

The system processes onboard sensor inputs, reasons about the physical environment, plans next actions, and executes motion on the robot.

Output: Real-time robotic behavior executed on physical hardware, with perception, planning, and control running directly on the onboard compute system.

You can find further publications of NVIDIA covering physical AI here.

System overview of NVIDIA’s robotics stack, showing how training compute, simulation, and on-robot runtime connect through a unified development pipeline. Source: NVIDIA.

Source: What Is NVIDIA’s Three-Computer Solution for Robotics? (NVIDIA)

⚛️ Firgun Ventures Launches $250 Million VC Fund to Invest in Quantum (The Quantum Insider)

“Firgun Ventures announced a $70 million first close to launch what it calls the market’s first VC fund focused on early growth-stage quantum technology companies, backed by the Qatar Investment Authority. The fund, targeting $250 million, will invest globally in quantum computing, sensing, communications, and related applications in sectors such as healthcare, climate science, finance, and cybersecurity.

Founded by Kris Naudts and Zeynep Koruturk, the firm combines scientific, entrepreneurial, and financial expertise supported by an advisory council from leading institutions including Cambridge, Oxford, MIT, Google, the European Investment Bank, and the Wellcome Trust.”

If you want to learn what Zeynep and Kris look for in quantum startups and how they think about exit pathways, check out the interview on the Future of Computing blog!

🦾 The Energy Economics of Inference (Contrarian Ventures)

This deep dive explains that the real constraint in modern AI is increasingly energy per token rather than compute. As inference becomes sparse, memory-heavy and agentic, most energy is spent on memory access, data movement and idle time instead of FLOPs. This exposes a structural mismatch with GPUs, which were built for dense, regular workloads. The analysis points toward architectures designed around bandwidth and locality, including memory-centric chips, optical interconnects and neuromorphic systems that better match the event-driven nature of modern inference.

Last week’s headlines featured new semiconductor developments from SK hynix, TSMC, and imec, advances in quantum, photonic, and neuromorphic hardware, major AI infrastructure moves in data centers and cloud, and the launch of Claude Opus 4.5.

🦾 Semiconductors

SK hynix launches honey banana HBM Chips to popularize semiconductors in Korea (Biz Chosun)

Tachyum open sources 281 Gb/s tDIMM for the future of AI and computing (Tachyum)

GigaDevice Launches GD25NX Series xSPI NOR Flash with Dual Voltage Design (GigaDevice)

TSMC to Build Three 2-Nanometer Factories in Taiwan (Chosun)

Imec strengthens its global presence with new regional research & development hub in Qatar (imec)

Cadence adds 10 new VIPs to strengthen verification IP portfolio for AI designs (Cadence)

⚛️ Quantum

Terra Quantum Develops Laser System to Treat Cardiovascular Disease (The Quantum Insider)

Japan to Link Major Cities with 600-km Quantum Encryption Network (The Quantum Insider)

Scientists Set New Mobility Record in Quantum-Compatible Semiconductor (The Quantum Insider)

SEALSQ and Quobly announce collaboration to advance secure and scalable quantum technologies (SEALSQ)

Variational Double Bracket Flow with Sparse Pauli Dynamics Achieves <1% Error for 100-qubit Heisenberg Lattices (Quantum Zeitgeist)

10-Qubit Array Advances Germanium Quantum Computing (Quantum Zeitgeist)

Trumpf aims to improve its lasers with quantum computers (The Quantum Insider)

⚡️ Photonic / Optical

Light-Speed Ambition: GlobalFoundries acquires AMF and Infinilink to power the AI datacenter revolution (GlobalFoundries)

Single-Photon Switch Could Enable Photonic Computing (The Quantum Insider)

🧠 Neuromorphic

Neuromorphic Accelerator Performance Bottlenecks Modeled, Revealing 3.38x, 3.86x Gains through Optimized Sparsity (Quantum Zeitgeist)

A Korean Research Team Advances Neuromorphic Semiconductor Technology (BusinessKorea)

VLSI expert partners with Innatera to advance neuromorphic computing education (New Electronics)

Neuromorphic Hardware Enables Low-Power, Event-Based Pupil Tracking with Microsecond Resolution (Quantum Zeitgeist)

💥 Data Centers

AWS is spending $50B to build AI infrastructure for the US government (TechCrunch)

Skeleton opens €220 M Leipzig superfactory to power Europe’s AI and grid stability (tech.eu)

Cooling issue at data center halts futures trading for CME Group (Data Center Dynamics)

☁️ Cloud

NATO and Google Cloud Sign Multi-Million Dollar Deal for AI-Enabled Sovereign Cloud (Google Cloud)

Google drops EU antitrust complaint against Microsoft as Brussels’ cloud probe intensifies (Capacity Global)

🤖 AI

Introducing Claude Opus 4.5 (Anthropic)

Neuromorphic chips run spiking workloads by passing activation messages between many parallel neurocores, each updating neuron states in lockstep timesteps. Source: Quantum Zeitgeist.

This reading list covers Europe’s diamond ambitions, open chiplet designs, quantum insights from diamond defects, nonlinear photonic architectures, neuromorphic systems with time sync and cooling, and the AI-driven shift in data center buildouts.

🦾 Semiconductors

Europe’s diamond moment: A new semiconductor ecosystem in the making (tech.eu) (7 mins)

Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond (arXiv) (37 mins)

Improving IC System Quality and Performance (SemiEngineering) (14 mins – Video)

The real-world impact of silicon lifecycle management on chip architectures (SemiEngineering) (24 mins)

⚛️ Quantum

Diamond defects, now in pairs, reveal hidden fluctuations in the quantum world (Princeton Engineering) (7 mins)

Bain’s Quantum Computing Report: Advances to Real-World Applications (Quantum Zeitgeist) (12 mins)

What is the difference between a TPU (Tensor Processing Unit) and a QPU (Quantum Processor)? (Quantum Zeitgeist) (13 mins)

⚡️ Photonic / Optical

On-chip photonic crystal dressed Rydberg exciton polaritons with enhanced nonlinearity in monolayer WS2 (Nature Communications) (57 mins)

Photonic fully-connected hybrid beamforming using microring weight banks (Nature Communications) (64 mins)

🧠 Neuromorphic

Neuromorphic detection and cooling of microparticles in arrays (Nature Communications) (63 mins)

A deterministic neuromorphic architecture with scalable time synchronization (Nature Communications) (77 mins)

💥 Data Centers

75% of new data center projects target AI workloads — report (Data Center Knowledge) (13 mins)

AWS has more than 900 data centers — report (Data Center Dynamics) (5 mins)

Overview of the photonic mode in the hybrid hBN/WS₂ structure, showing how light interacts with the material and where the optical field is concentrated. Source: Nature Communications.

After several very active weeks, this one was noticeably quieter and unusually concentrated in early-stage activity. It was essentially a week of photonics. Did we miss any rounds?

A few key points on Google’s aggressive push to commercialize TPUs and challenge NVIDIA’s dominance:

• Google is now selling TPUs directly to multiple external firms, which represents a major shift in its commercialization strategy.

• Claude 4.5 Opus and Gemini 3 (“the two best models in the world”) run mostly on Google TPUs and Amazon Trainium, not on NVIDIA chips.

• Gemini 3 was trained entirely on TPUs, showing that TPU performance is competitive at the highest model quality levels.

• Anthropic is deploying up to 1 million TPUs, with 400,000 purchased as hardware racks and 600,000 rented through GCP, positioning Google as a true merchant silicon vendor.

• OpenAI has already lowered its NVIDIA TCO by about 30% simply by negotiating with the option to adopt TPUs, showing the pricing pressure Google can now apply.

• Meta, SSI, xAI, and potentially OpenAI are now being targeted as external TPU customers, signalling a rapidly expanding TPU ecosystem beyond Google’s own workloads.

Market performance of TPU-, Trainium-, and Nvidia-exposed infrastructure moved notably across 2025 as key supply and customer milestones were announced. Source: SemiAnalysis.

Source: TPUv7: Google Takes a Swing at the King (SemiAnalysis)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: The second part of our Memory Wall series takes a closer look at HBM (High Bandwidth Memory), explaining how HBM’s layered architecture, production process, and shifting market demand define its position in today’s high-performance memory landscape.

• Spotlights: Q.ANT introduces its second-generation photonic Native Processing Unit for energy-efficient AI and HPC and d-Matrix partners with Alchip on a 3D DRAM-based inference accelerator that validates its in-memory compute approach on test silicon.

• Headlines: Semiconductor updates from metrology to PCB and SRAM advances, expanding quantum–HPC integrations and defense strategies, progress in photonic pilots and acquisitions, neuromorphic sensing research, and large data center, networking, and AI build-outs and partnerships.

• Readings: Semiconductor supply chain and packaging challenges, quantum error correction and simulation progress, renewed photonics investment, neuromorphic advances, and energy and sovereignty issues in data center and cloud infrastructure.

• Funding news: A very active week with numerous Seed and Series A rounds across cloud, semiconductors, photonics, quantum, and data centers, while Lambda’s $1.5B Series E shows how a single large cloud round can dominate overall capital deployed.

• Bonus: Washington’s latest semiconductor and AI moves, from slowing broad chip-import tariffs and approving controlled Nvidia Blackwell exports to the Gulf, to proposing SEMI Act tax credits and preparing new limits on state-level AI rules amid strong public support for AI safety.

Building on last week’s analysis of FMC and Majestic Labs and their innovations in the memory stack, this issue turns to the memory technology at the core of all major AI accelerators: High Bandwidth Memory (HBM).

What is HBM

As outlined last week, each memory tier comes with its own trade-offs. SRAM provides high speed but offers very little density, while DRAM delivers high density but does not provide the bandwidth required for modern workloads.

The dominant choice today is on-package High Bandwidth Memory (HBM), which combines vertically stacked DRAM layers, very wide data interfaces, and integration on the same package as the compute die. Because it is positioned directly beside GPUs, TPUs, and custom AI processors, HBM functions as the closest and fastest external memory layer available to these devices. Taken together, these design features allow HBM to provide a balanced mix of capacity, bandwidth, and efficiency compared to other memory types.

Hence, HBM is a memory technology that delivers:

• high bandwidth through thousands of I/O connections

• high density through vertically stacked DRAM dies

• low energy per bit moved through very short transfer distances

This combination enables the multi-terabyte bandwidth required by current accelerators.

Structure of an HBM stack and its connection to the compute die. Source: SemiAnalysis.

HBM Manufacturing

HBM production spans two main process stages:

• Front-end processing: converting standard DRAM wafers into HBM wafers by forming TSVs (vertical connections through the silicon) and adding bumps (solder contacts for die-to-die connection) on both sides of the die.

• Back-end processing: assembling and packaging the stacked dies using flows that support efficient joint formation, manage heat dissipation, and limit warpage and bump stress.

Two cross-cutting topics shape the overall manufacturing flow:

• Yield challenges: arise from the demands of 3D stacking, delivering power through TSVs, and managing heat in a structure that becomes more sensitive as layer counts increase.

• Bonding tools: must provide sub-micron alignment and controlled pressure to attach each die layer accurately, since misalignment or uneven force can damage bumps and reduce overall yield.

HBM Buyers and Demand

Demand for HBM has expanded rapidly in step with the growth of AI accelerators. Even with the increasing presence of custom ASICs, Nvidia is expected to remain the largest user of HBM in 2027. Its roadmap drives this, with Rubin Ultra alone moving to 1TB of HBM per GPU. Broadcom follows, supported by rising volumes of TPU and MTIA devices. Additional demand comes from OpenAI and SoftBank projects, which contribute smaller but still noticeable increases. Amazon is also becoming one of the major purchasers and follows a strategy of sourcing HBM directly rather than relying solely on design partners, which helps reduce its overall cost.

More detailed, chip-level bit forecasts are available in the Accelerator Model by SemiAnalysis.

Nvidia’s HBM Roadmap. Source: SemiAnalysis.

Source: Scaling the Memory Wall: The Rise and Roadmap of HBM (SemiAnalysis)

⚡️ Q.ANT Unveils its Second-Generation Photonic Processor to Power the Next Wave of AI and HPC (Q.ANT)

“Q.ANT today announced the availability of its next-generation Native Processing Unit: The Q.ANT NPU 2, with enhanced nonlinear processing capabilities to deliver orders-of-magnitude gains in energy efficiency and performance for AI and high-performance workloads. By performing nonlinear mathematics natively in light, the Q.ANT NPU 2 enables entirely new classes of AI and scientific applications including physical AI and advanced robotics, next-generation computer vision and industrial intelligence, physics-based simulation and scientific discovery. Q.ANT is offering its NPUs directly as a 19” Server Solution including x86 host processor and Linux operating system.”

Stay tuned for our upcoming interview with Q.ANT on our blog!

 🦾 d-Matrix and Alchip Announce Collaboration on World’s First 3D DRAM Solution to Supercharge AI Inference (d-Matrix)

“d-Matrix, the pioneer in generative AI inference for data centers, and Alchip, the high-performance and AI infrastructure ASIC leader, are collaboratively developing the world’s first 3D DRAM-based datacenter inference accelerator that will eliminate the performance and cost bottlenecks constraining today’s AI infrastructure.

The joint initiative combines Alchip’s ASIC design expertise with d-Matrix’s digital in-memory compute platform architecture. The collaboration has already enabled a key technology, d-Matrix 3DIMC™, that is featured on d-Matrix Pavehawk™ test silicon and has been successfully validated in d-Matrix’s labs.”

Last week’s headlines featured new semiconductor updates, fresh quantum–HPC collaborations, progress in photonic and neuromorphic hardware, major data center expansion plans, and new alliances across networking and AI.

🦾 Semiconductors

Nearfield Instruments signs Multi-Year Development Project to Advance Semiconductor Metrology (Nearfield Instruments)

Advanced Memory Prices Likely to Double as DRAM Crunch Spreads on NVIDIA Pivot, Structural Factors (Counterpoint Research)

Rubin’s Cableless Architecture and ASIC High-Layer HDI Designs Push PCBs to the Center of AI Compute Power, Says TrendForce (TrendForce)

NanoIC adds advanced SRAM memory macros to its N2 pathfinding PDK (imec)

Synopsys Demonstrates Framework for Optimizing Manufacturing Processes with Digital Twins at Microsoft Ignite (Synopsys)

Nvidia’s record $57 billion revenue and upbeat forecast quiets AI bubble talk (TechCrunch)

⚛️ Quantum

Infleqtion and Oak Ridge National Laboratory Partner to Advance Quantum–HPC Integration (Infleqtion)

Supercomputing Centers to Integrate Quantum Processors Using NVIDIA’s NVQLink (The Quantum Insider)

NVIDIA and RIKEN Deploy New Supercomputers for AI and Quantum Research (The Quantum Insider)

Pentagon Elevates Quantum Tech to Core of Future Battlefield Strategy (The Quantum Insider)

QSolid Makes Prototype Quantum Computer Available for First External Testing (The Quantum Insider)

Qsentry Detects Quantum Neural Network Backdoors with 93.2% Accuracy, Even at 1% Poisoning Rates (Quantum Zeitgeist)

⚡️ Photonic / Optical

GUC and Ayar Labs Partner to Advance Co-Packaged Optics for Hyperscalers (Business Wire)

High Tech Campus Eindhoven to build cleanroom for TNO’s 6-inch photonic chip pilot line (Cleanroom Technology)

New photonic chips passively convert laser light into multiple colors on demand (Phys.org)

GlobalFoundries Acquires Advanced Micro Foundry, Accelerating Silicon Photonics Global Leadership and Expanding AI Infrastructure Portfolio (GlobalFoundries)

🧠 Neuromorphic

Two-dimensional MXene-based advanced sensors for neuromorphic computing intelligent application (EurekAlert!)

💥 Data Centers

Elon Musk announces massive xAI data center in Saudi Arabia (NBC News)

imec unveils imec.kelis: A breakthrough tool for AI datacenter design and optimization (imec)

Nokia deepens commitment to AI data center and edge innovation with Open Compute Project Platinum membership (Nokia)

500 MW data center campus in the works outside Leipzig, Germany (Data Center Dynamics)

Arm Neoverse platform integrates NVIDIA NVLink Fusion to accelerate AI data center adoption (Arm)

📡 Networking

AWS claims cloud provider first with DWDM transponder (ComputerWeekly)

🤖 AI

Microsoft, Nvidia and Anthropic announce partnership (Nvidia)

Hybrid classical–quantum workflow used to show how QSentry detects backdoor attacks via anomalies in quantum measurement outputs. Source: Quantum Zeitgeist.

This reading list covers semiconductor supply chain risks and packaging costs, quantum progress amid talent shortages, advances in photonic and neuromorphic chips, energy challenges in data centers, and Europe’s evolving stance on cloud sovereignty.

🦾 Semiconductors

New technologies and familiar challenges could make semiconductor supply chains more fragile (Deloitte) (9 mins)

Microcontrollers enter a new growth cycle as the market targets US $34 billion in 2030 (Yole Group) (9 mins)

Made in China 2025: Evaluating China’s Performance (U.S.-China Economic and Security Review Commission) (Page 5 to 8 - 14 mins)

The Thermal Trap: How Dielectrics Limit Device Performance (SemiEngineering) (24 mins)

New Panel Production Efforts Target Interposer Costs (SemiEngineering) (22 mins)

SEMI Europe – Chips Act Report: 30 SEMI Recommendations for a Chips Act 2.0 (SEMI) (73 mins)

Issues In Ramping Advanced Packaging (SemiEngineering) (11 mins – Video)

⚛️ Quantum

Report: Error Correction Becomes Universal Priority But Talent Shortage Looms (The Quantum Insider) (8 mins)

Unprecedented Perlmutter Simulation Details Quantum Chip (Lawrence Berkeley Lab) (16 mins)

Google AI Outlines Path to Useful Quantum Applications (Quantum Zeitgeist) (32 mins)

Quantum-enhanced performance: Two-dimensional superconducting interference arrays overcome area limitations (Quantum Zeitgeist) (11 mins)

Real-space Time-Dependent Schrödinger Equation Solved with Fermionic Antisymmetric Spatio-Temporal Network (Quantum Zeitgeist) (12 mins)

⚡️ Photonic / Optical

Photonic edge intelligence chip for multi-modal sensing, inference and learning (Nature Communications) (53 mins)

Mode-locking in a semiconductor photonic bandgap laser (Communications Physics) (53 mins)

Reconfigurable chalcogenide integrated nonlinear photonics (Nature Communications) (67 mins)

Sustainable Photonics Manufacturing (AZO Optics) (6 mins)

How small can optical computers get? Scaling laws reveal new strategies (TechXplore) (6 mins)

🧠 Neuromorphic

Neuromorphic computing paradigms enhance robustness through spiking neural networks (Nature Communications) (54 mins)

Spiking Neuromorphic Transformer Achieves Attention Via Synaptic Plasticity, Reducing Energy Costs Beyond 0.49 (Quantum Zeitgeist) (7 mins)

💥 Data Centers

In focus: Data centres – an energy-hungry challenge (European Commission) (4 mins)

☁️ Cloud

Sovereignty 2.0: Why Europe’s €180 million cloud bet matters (World Economic Forum) (16 mins)

🤖 AI

One Giant Leap for AI Physics: NVIDIA Apollo Unveiled as Open Model Family for Scientific Simulation (NVIDIA) (3 mins)

Spiking neuromorphic Transformer that uses biologically inspired synaptic plasticity to achieve attention with far lower energy consumption. Source: Quantum Zeitgeist.

Last week saw a very high number of rounds across the computing stack, with unusually dense activity at the Seed and Series A stages. Despite the large number of early-stage raises, overall capital was dominated by a single very large cloud round (Lambda’s $1.5B Series E).

This week brought several policy moves in Washington that shape both the chip industry and the broader AI landscape.

The administration is expected to slow down its plan for broad semiconductor-import tariffs, as officials assess whether the move could heighten tensions with China.

Trump’s semiconductor tariff plan likely delayed, officials say (Reuters)

The U.S. also approved controlled exports of up to 35,000 NVIDIA Blackwell chips to the UAE and Saudi Arabia, subject to strict security and reporting requirements.

Statement on UAE and Saudi Chip Exports (U.S. Department of Commerce)

In Congress, the SEMI Investment Act was introduced to extend the 35% advanced manufacturing tax credit to U.S. producers of semiconductor materials, including substrates, thin films, and process chemicals.

Fitzpatrick, Boyle Launch Bipartisan SEMI Act to Reassert U.S. Control Over Critical Chip Materials and Strengthen American Manufacturing (U.S. House of Representatives)

At the same time, the White House is preparing an executive order aimed at limiting state-level AI regulation, even as a national poll shows that 80% of U.S. adults support maintaining federal rules focused on AI safety and data security.

Trump administration drafts an executive order to challenge state AI laws (NBC News)

Americans Prioritize AI Safety and Data Security (Gallup)

U.S. poll showing that 80% of adults prioritize maintaining AI safety and data-security rules, even if development slows. Source: Gallup.

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Breaking the Memory Wall Pt. 1 examines how FMC and Majestic Labs address the widening gap between compute and memory, with material, node-, and system-level approaches that improve bandwidth, capacity, and persistence for memory-bound workloads.

• Spotlights: IQM launches Halocene, a modular 150-qubit quantum computer line for error correction research, and SpiNNcloud delivers a brain-inspired supercomputer to the U.S. Neuromorphic Commons initiative.

• Headlines: Semiconductor updates from Baidu, SK keyfoundry, and Tachyum, major quantum advances, continued progress in photonics and neuromorphic tech, and new data center and cloud investments shaping AI infrastructure.

• Readings: HBM and NAND scaling, quantum simulation, photonic innovation, neuromorphic hardware for science and health, data center fragility, and AI funding dynamics.

• Funding news: A high volume of rounds led by semiconductors and data centers, including major Series C raises for d-Matrix and FMC, and system-level investments in Majestic Labs and Firmus Technologies.

• Bonus: Washington’s updated semiconductor strategy, where CSIS highlights flaws in the proposed Chip Security Act, while the Council on Foreign Relations outlines new recommendations to secure U.S. technology leadership.

Thanks to everyone who joined us at our Future of Computing conference in Paris! Huge thanks to iXcampus for hosting us, and to Creative Destruction Lab, HEC Paris, and Elaia for co-organizing ❤️

See you at the next one in London on March 24, 2026! We’re excited to once again have ConceptionX, Silicon Catalyst, IQ Capital, Barclays Eagle Labs, and XTX Ventures as supporting and co-organizing partners. You can sign up here 💡

In light of two major funding rounds last week, we take a closer look at the technologies behind them. FMC raised €100M to commercialize its DRAM+ and 3D CACHE+ memory chips, while Majestic Labs raised more than $100M to build AI servers with 1000× the memory capacity of a top-tier GPU.

The Memory Wall

Chips have scaled rapidly, but memory has not kept pace in capacity, bandwidth, access latency, or energy efficiency. Systems now spend much of their time and power budget moving data between caches, DRAM, and storage rather than performing useful computation, a limitation known as the “Memory Wall”.

As models increase in size and complexity, this bottleneck becomes more pronounced. Workloads such as large context windows, mixture-of-experts models, graph processing, and agentic systems require frequent access to large datasets, intensifying data movement and driving power consumption in AI data centers.

Overcoming the Memory Wall requires progress at several layers of the stack:

• materials and device structures that define the behavior of memory cells (FMC)

• node-level memory architectures that shape how data flows inside a compute node (FMC)

• system-level connections that determine how memory interacts with accelerators (Majestic Labs)

FMC: Memory Innovation in Materials and at the Node Level

A long-standing trade-off in memory design is the choice between speed and persistence (ability to retain data without power). DRAM and SRAM (fast but non-persistent) lose their data when powered down. In contrast, storage (persistent but slow) retains data but cannot serve AI workloads at the required speed.

FMC incorporates ferroelectric hafnium oxide into the memory-cell structure to introduce persistence into DRAM-class and SRAM-class memory while remaining compatible with standard semiconductor production lines.

What FMC is building

DRAM+ 

DRAM+ is a DRAM-class technology that adds non-volatility, allowing data to remain stored during power down. This reduces the need for frequent reload cycles and lowers data movement between fast volatile memory and slower persistent storage. DRAM+ is intended for high-performance databases, AI training and inference clusters, edge deployments, automotive systems, and industrial environments.

3D CACHE+ 

3D CACHE+ is an SRAM-class cache architecture that combines higher density, lower standby power, and persistence. According to FMC, it reaches ten times the density of conventional SRAM and reduces standby power by a factor of ten while retaining data without power. It is designed for next-generation chiplet architectures and targets high-performance AI inference systems that depend on fast, high-capacity on-package cache.

This places FMC’s approach inside the compute node, where persistence reduces data movement between fast memory and storage.

Majestic Labs: Memory Innovation at the System Level

Another long-standing trade-off is the imbalance between compute-rich and memory-poor accelerator systems. GPU servers offer significant FLOPs (floating-point operations) but relatively limited on-board memory. As a result, organizations often scale out multiple racks simply to obtain the memory capacity needed for large models, not to add more compute.

Majestic Labs works on reducing this imbalance by using custom accelerator and memory interface chips to decouple memory from compute and provide far more memory capacity within a single server.

What Majestic Labs is building

Majestic Labs’ servers use custom accelerator and memory interface chips to disaggregate memory and connect compute to large external memory pools. Each server supports up to 128 TB of high-bandwidth memory, almost one hundred times more than a typical GPU server and roughly equivalent to the capacity and bandwidth of about ten racks.

Majestic Labs states that this architecture offers up to one thousand times the memory capacity of a top-tier GPU and can run workloads that keep large contexts or model states in memory, such as large context windows, mixture-of-experts models, agentic systems and graph neural networks. The system runs natively with common AI frameworks and remains fully programmable beyond transformer-based models.

This places Majestic Labs’ approach at the system level, where disaggregation increases total memory per server and reduces scale-out overhead.

Diagram illustrating how FMC uses phase-engineered hafnium oxide to enable ferroelectric behavior and nonvolatile memory operation. Source. FMC.

Unfortunately, since the website of Majestic Labs is still in stealth mode, we could not find visuals explaining the technical details :-(

Sources: FMC 1, FMC 2, FMC 3, Tech Funding News, Business Wire (2025)

⚛️ IQM launches Halocene, a new quantum computer product line for error correction (Business Wire)

“IQM Quantum Computers, a global leader in superconducting quantum computers, today announced the launch of its new product line called IQM Halocene. The new product line is based on open and modular on-premises quantum computers designed for quantum error correction research, a leap towards the next generation of quantum computers.

The first release of IQM Halocene will be a 150-qubit quantum computer with advanced error correction functionality. The system will enable users to advance their error correction capabilities, error correction research and to create intellectual property with logical qubits. In addition, the Halocene product line will allow execution of Noisy Intermediate Scale (NISQ) algorithms and the development of error mitigation techniques.”

⚡️ SpiNNcloud Delivers Brain‑Inspired Supercomputer to THOR: A Landmark Neuromorphic Commons Initiative in the U.S. (ACCESS Newswire)

“SpiNNcloud Systems today announced that its cutting-edge supercomputing platform, built on the SpiNNaker2 architecture, has been adopted by the Neuromorphic Commons (THOR), marking a major milestone in the advancement of brain-inspired high-performance computing (HPC) and artificial intelligence (AI).

The SpiNNaker2-based system now ranks among the top four largest neuromorphic computing platforms globally, simulating over 393 million neurons. Designed by Professor Steve Furber, the original architect of ARM, SpiNNaker2 leverages a massively parallel array of low-power processors to deliver scalable, energy-efficient performance for both AI and neuroscience workloads.”

If you’d like to learn more about what SpiNNcloud is building, check out our interview!

Last week’s headlines featured new semiconductor developments, major quantum advances, progress in photonics and neuromorphic tech, big data center and cloud investments, and fresh shifts in AI.

🦾 Semiconductors

Baidu answers China’s call for home-grown silicon with custom AI accelerators (The Register)

Cadence to acquire Seattle startup ChipStack to boost chip design automation (GeekWire)

SK keyfoundry, accelerates development of SiC-based compound power semiconductor technology (SK keyfoundry)

RPI researchers advance understanding of semiconductor crystal growth (RPI)

Tachyum unveils 2 nm Prodigy with 21× higher AI rack performance than the Nvidia Rubin Ultra (Business Wire)

Tsavorite Scalable Intelligence sets new frontier for AI efficiency and scale with the Omni Processing Unit (Tsavorite Scalable Intelligence)

⚛️ Quantum

China’s new photonic quantum chip promises 1000-fold gains for complex computing tasks (The Quantum Insider)

Evidence of exotic superconductivity found in twisted graphene opening new paths for quantum devices (The Quantum Insider)

SECQAI Tapes Out CHERI TPM with Post-Quantum Cryptography for Secure Computation (The Quantum Insider)

Q-CTRL connects Fire Opal with RIKEN’s IBM quantum system two for hybrid quantum-classical computing (The Quantum Insider)

IBM reveals new quantum processors, software and algorithm advances (The Quantum Insider)

Haiqu demonstrates improved anomaly detection and pattern recognition with IBM quantum computer (The Quantum Insider)

⚡️ Photonic / Optical

Ravi Pradip’s CoreDAQ drops the barrier to entry for silicon photonics experimentation (Hackster.io)

New photonic system performs tensor maths at speed of light for next-gen AI processing (Interesting Engineering)

CCraft invests €2.7 million to scale up photonic chip production in Neuchâtel (GGBa)

🧠 Neuromorphic

Innatera signs Joya as ODM customer for neuromorphic edge AI (InsideHPC)

DorsaVi Shares Jump 18% on Acquisition of Neuromorphic Technology (Stocks Down Under)

💥 Data Centers

Microsoft-backed Veir is bringing superconducting cables to data centers (TechCrunch)

Anthropic announces $50 billion data center plan (TechCrunch)

Google announces €5.5 billion investment in Germany, including AI infrastructure, through 2029 (Google Cloud)

AMD Sets Ambitious Data Center Revenue Target in AI Expansion Push (ad-hoc News)

☁️ Cloud

Google opens sovereign cloud hub in Germany (SDxCentral)

Oracle shares face mounting pressure as cloud profitability concerns intensify (ad-hoc News)

📡 Networking

Megaport to acquire Latitude.sh, creating an industry-leading compute and network-as-a-service platform (Business Wire)

🤖 AI

OpenAI will lose $74 billion the same year that Anthropic breaks even: Report (Gizmodo)

Ex-OpenAI exec Mira Murati’s Thinking Machines Lab nears $50B valuation (Tech Funding News)

Leaked documents shed light into how much OpenAI pays Microsoft (TechCrunch)

Direct tensor processing with coherent light: POMMM results versus GPU outputs, optical fields, and error metrics. Source: Interesting Engineering/Nature.

This reading list covers HBM and NAND scaling, quantum simulation, photonic innovation, neuromorphic hardware for science and health, data center fragility, and AI funding dynamics.

🦾 Semiconductors

HBM leads the way to defect-free bumps (SemiEngineering) (18 mins)

New rules put the squeeze on semiconductor gray market (SemiEngineering) (21 mins)

Unlocking z-pitch scaling for next-generation 3D NAND flash (imec) (18 mins)

Photolithography Materials Market Growth: Continuing Growth of EUV and Advanced Node Demand (Techcet) (4 mins)

Memory Industry to Maintain Cautious CapEx in 2026, with Limited Impact on Bit Supply Growth (TrendForce) (7 mins)

⚛️ Quantum

Universal Quantum Simulation of 50 Qubits on Europe’s First Exascale Supercomputer (arXiv) (34 mins)

Rigetti Computing Reports Third Quarter 2025 Financial Results; Provides Technology Roadmap Updates for 2026 and 2027 (Rigetti Computing) (25 mins)

⚡️ Photonic / Optical

Photonics start-ups powering Europe’s innovation (Optics.org) (11 mins)

Gyromorphs should block light in all directions (Optica OPN) (7 mins)

Enhanced optical bistability in slotted photonic crystal structure for microwave frequency generation (Nature) (43 mins)

🧠 Neuromorphic

Solving sparse finite element problems on neuromorphic hardware (Nature) (64 mins)

A neuromorphic approach to early arrhythmia detection (Nature) (54 mins)

Ferroelectric Neuromorphic Memory: A Step Toward Bio-Inspired Computing (Bioengineer.org)(15 mins)

Neuromorphic hardware tackles sparse finite element challenges (Bioengineer.org) (12 mins)

💥 Data Centers

Data centers at risk: the fragile core of American power (Foreign Policy Research Institute) (17 mins)

Are data centers the new oil fields? (TechCrunch) (32 mins – Podcast)

🤖 AI

The circular money problem at the heart of AI’s biggest deals (TechCrunch) (26 mins – Video)

Multiple AI scale-up options emerge (SemiEngineering) (23 mins)

Comparison of Ethernet-based scaling protocols, showing shared PHY foundations and L2 enhancements. Source: SemiEngineering.

Last week brought an unusually high number of rounds, led by significant activity in semiconductors and data centers. Semiconductors accounted for the majority of deals across all stages, including two major Series C raises. Data centers contributed the largest individual financing, while quantum and networking remained relatively small in comparison.

Two major policy analyses from last week look at how Washington aims to protect and rebuild its semiconductor leadership.

CSIS: Gaps in the U.S. Proposed Chip Security Act

A set of weaknesses in the proposed chip-level security mechanisms for advanced GPUs.

Key points

• Location verification cannot be trusted if trusted execution environments are compromised, which leaves a core enforcement mechanism unsupported.

• Telemetry and location signals can be spoofed, making it possible for diverted chips to appear compliant even when they are not.

• Chips deployed in firewalled, intermittently connected or air-gapped data centers cannot perform the required check-ins, which undermines any post-shipment monitoring.

• The verification model depends on a global network of trusted servers that does not exist today, leaving the mechanism without the infrastructure it requires to function.

• Missing or irregular verification signals cannot be interpreted reliably, since non-response is common in real data center environments and cannot be used to identify diversion.

The Architecture of AI Leadership: Enforcement, Innovation, and Global Trust (Center for Strategic and International Studies)

Council on Foreign Relations: Recommendations to Advance the U.S. Chip Industry

A set of policy recommendations to strengthen the U.S. semiconductor supply chain.

Key points

• Onshore the manufacturing of critical semiconductor inputs and components, including chemicals, PCBs and IC substrates.

• Secure critical minerals by expanding the National Defense Stockpile, accelerating permitting and advancing recovery and substitution technologies with partners and allies.

• Strengthen the workforce by supporting machinists, electricians and other trades essential for semiconductor manufacturing.

• Establish an Economic Security Center at the Department of Commerce to improve coordination, technical expertise and public-private collaboration.

• Use Department of Defense procurement to accelerate development of a utility-scale quantum computer.

U.S. Economic Security: Winning the Race for Tomorrow’s Technologies (Council on Foreign Relations)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Beyond the GPU hype, this deep dive explores why CPUs still handle most high-performance workloads, how new architectures advance, and why GPU migration remains challenging.

• Spotlights: Quantinuum launches Helios, its most accurate commercial quantum computer to date, and Deutsche Telekom partners with NVIDIA on a €1 billion data center project to power Germany’s new Industrial AI Cloud.

• Headlines: Semiconductor moves including SK Hynix’s HBM advances, quantum breakthroughs, progress in photonics and neuromorphic tech, and major data center and AI expansions.

• Readings: Semiconductor scaling and market trends, quantum networking and lunar experiments, renewed photonics investment, neuromorphic edge growth, and evolving AI data center infrastructure.

• Funding news: Moderate activity, led by EdgeCortix’s $110M Series B in semiconductors, alongside early-stage deals in quantum and data-center infrastructure.

• Bonus: The latest Data Center Construction Cost Index shows stabilizing prices for traditional builds, a persistent AI premium for liquid-cooled facilities, and shifting regional cost patterns as supply chains mature.

GPUs dominate the spotlight and are expected to grow installations by more than 17% annually through 2030. However, CPUs continue to handle most of the world’s real computational work, powering roughly 80–90% of all high-performance simulation workloads.

GPU-powered AI may define the public narrative, but a quieter transformation is unfolding beneath it. CPUs, long the backbone of scientific and industrial computing, are undergoing a technological renaissance. Far from obsolete, they remain essential for workloads where stability, precision, and compatibility matter more than raw parallelism.

Fit-for-Purpose Computing

Supercomputing has never been about one-size-fits-all infrastructure. Each workload, whether climate modeling, financial risk analysis, or molecular dynamics, requires a specific balance of performance, precision, and cost.

GPUs excel at highly parallel workloads like AI training and image generation. But CPUs remain unmatched for tasks involving complex control logic, sequential processing, and high numerical accuracy, particularly in fields governed by regulation or decades of validated code.

The New Wave of CPU Innovation

While GPUs pioneered advances like High-Bandwidth Memory (HBM) and stacked cache architectures, CPUs are now adopting these technologies to bring GPU-class bandwidth and efficiency to general-purpose computing. A new generation of architectures is emerging that closes performance gaps while preserving compatibility:

• High-Bandwidth Memory (HBM): Integrating HBM directly on the CPU package delivers multi-terabyte-per-second bandwidth, a leap of 4–5× over previous generations, without code changes. Since most HPC workloads are memory-bound, these gains translate into immediate real-world performance improvements.

• 3D V-Cache and Stacked Architectures: By vertically stacking additional cache (high-speed on-chip memory) on top of the CPU die, next-generation processors can triple cache capacity. This keeps larger datasets physically closer to compute units, reducing latency and boosting performance in iterative simulations and data-intensive workloads.

Together, these advances represent the most significant leap in CPU memory performance in two decades, reshaping what is possible for bandwidth-constrained applications across weather, finance, and engineering domains.

Challenges in Transitioning Beyond CPUs

As workloads scale, the promise of GPU acceleration is hard to ignore. Yet shifting from CPU-based systems remains far from straightforward. Despite their performance potential, several practical and economic barriers keep CPUs central to high-performance computing:

• Code Modernization and Migration Effort: Most scientific and engineering applications are written in specific programming languages, deeply tied to CPU architectures. Porting them to GPUs demands extensive refactoring and optimization before they can run efficiently.

• Verification and Reliability: Once adapted, critical codes must be rigorously re-tested to ensure correctness and compliance, especially in regulated sectors such as aerospace, energy, and finance, adding further cost and delay to migration efforts.

• Power and Cooling Overheads: GPUs often require significantly higher power budgets and generate more heat per chip, increasing demands on cooling infrastructure. Over time, these energy and thermal costs can erode the efficiency gains achieved through faster computation.

• Rapid Hardware Obsolescence: GPU architectures evolve quickly, often requiring re-tuning with each generation. This pace of change is far faster than on CPUs, limiting long-term stability and complicating maintenance for large-scale deployments.

• Cost and Total Cost of Ownership (TCO): When all factors are considered (migration, infrastructure, re-optimization, and energy consumption), the overall economics can deteriorate quickly, often offsetting theoretical performance gains.

Together, these factors do not diminish the importance of GPUs, but they underline that CPUs remain the backbone of high-performance computing today.

Source: Designing CPUs for Next-Generation Supercomputing (MIT Technology Review, 2025)

⚛️ Quantinuum announces commercial launch of Helios (The Quantum Insider)

“Quantinuum has launched Helios, described as the world’s most accurate general-purpose commercial quantum computer, to accelerate enterprise adoption and enable hybrid quantum–classical computing.

Helios integrates with NVIDIA’s GB200 processors via NVQLink, expanding Quantinuum’s partnership with NVIDIA to support real-time error correction, hybrid programming through the new Guppy language, and applications in GenAI, materials, and finance.”

💥 Deutsche Telekom and NVIDIA Launch Industrial AI Cloud (NVIDIA)

“The partnership brings together Deutsche Telekom’s trusted infrastructure and operations and NVIDIA AI and Omniverse digital twin platforms to power the AI era of Germany’s industrial transformation.

[…]

The platform harnesses state-of-the-art NVIDIA hardware — including DGX B200 systems and RTX PRO Servers — as well as software including NVIDIA AI Enterprise and NVIDIA Omniverse, fully integrated into Deutsche Telekom’s cloud and network ecosystem.

Built in German data centers and powered by up to 10,000 NVIDIA GPUs, the Industrial AI Cloud gives manufacturers, automakers, robotics, healthcare, energy and pharma leaders the compute muscles they need.”

In addition, Deutsche Telekom and NVIDIA signed a €1 billion partnership to build a data center in Munich.

Last week’s headlines featured semiconductor moves from SK Hynix, Tesla, and Volkswagen, breakthroughs in quantum networking and national initiatives, advances in photonics and neuromorphic tech, major data center and cloud investments, and new AI infrastructure updates.

🦾 Semiconductors

HBM Manufacturing Capacity: SK Hynix CEO Kwak No-jung: HBM4 and HBM4E 16-stack Launch Imminent (BusinessKorea)

Vulnerability: RDSEED Failure on AMD “Zen 5” Processors (AMD)

ASE Unveils IDE 2.0 – AI-Enhanced Platform Accelerates Package Design Accuracy and Innovation (ASE)

Volkswagen Group introduces first self-developed chip (CARIAD)

Elon Musk says Tesla, Inc. will build its own chip fab, looking into Intel Corporation collaboration (Nikkei Asia)

Dutch official says he trusts Nexperia chips will reach world in coming days (Reuters)

⚛️ Quantum

Two independent quantum networks successfully fused into one (Phys.org)

Breakthrough could connect quantum computers at 200X the distance (Phys.org)

Quantum systems show advantage over classical ones under latency constraints (The Quantum Insider)

SMAraq integrates quantum optics on a chip (The Quantum Insider)

UK signals “Quantum Decade” with new investments and international deals to unlock £11 billion economic potential (Tech.eu)

Xanadu Expected to Become the First and Only Publicly Traded Pure-Play Photonic Quantum Computing Company (GlobeNewswire)

YC-backed Conductor Quantum partners with Finland’s SemiQon to push silicon quantum computing forward (The Quantum Insider)

Defence-related quantum news:

DARPA advances quantum computing initiative (The Quantum Insider)

PsiQuantum and Lockheed Martin form strategic collaboration (The Quantum Insider)

STV and Post-Quantum partner on quantum-safe defence networks (Tech.eu)

⚡️ Photonic / Optical

Thin resistor routinely used in photonic devices can also act as a thermometer (TechXplore)

ASML’s Anne Hidma: AI is fueling demand — Photonics can meet it (Innovation Origins)

🧠 Neuromorphic

Brain-inspired chips are helping electronic noses better mimic human sense of smell (TechXplore)

💥 Data Centers

Nvidia-backed Nscale plagued by infighting, botched acquisition and IP lawsuit (Sifted)

Infineon and SolarEdge collaborate to advance high-efficiency power conversion and energy storage (Infineon)

Meta announces plans to spend $600 B in the US over three years (SiliconANGLE)

’Neocloud’ Crusoe Energy Systems nears stock sale for employees at $13 billion valuation (Reuters)

Microsoft and G42 accelerate UAE’s digital future with major data centre expansion (Microsoft)

Deutsche Bank explores hedges for data centre exposure as AI lending booms (Financial Times)

Project Suncatcher: Exploring a space-based, scalable AI infrastructure system design (Google Research)

OpenAI asked Trump administration to expand Chips Act tax credit to cover data centers (TechCrunch)

☁️ Cloud

OpenAI and Amazon ink $38B cloud computing deal (TechCrunch)

Microsoft inks $9.7B deal with Australia’s Iren for AI cloud capacity (TechCrunch)

EU Data Act – cloud switching provisions – what do they mean for different parties and what are the sticking points? (Taylor Wessing)

OpenAI possibly plans to become a full-scale cloud provider (Dev.ua)

Announcing Ironwood TPUs General Availability and new Axion VMs to power the age of inference (Google Cloud)

📡 Networking

Keysight and MediaTek Collaborate to Advance Pre-6G Integrated Sensing and Communication Technology (Keysight)

🤖 AI

Alibaba-backed Moonshot releases new AI model Kimi K2 Thinking (CNBC)

Sam Altman says OpenAI has $20 B ARR and about $1.4 trillion in data-center commitments (TechCrunch)

Scheme of quantum network fusion, network architecture and operation principle. Source: Phys.org.

This reading list covers semiconductor market shifts and scaling challenges, lunar quantum experiments and new qubits, renewed investment in photonics, neuromorphic market growth, cloud governance trade-offs, and evolving infrastructure for AI at the edge and in data centers.

🦾 Semiconductors

ClusterMAX™ 2.0: The Industry Standard GPU Cloud Rating System (SemiAnalysis) (63 mins)

Overcoming The vdW Gap Bottleneck in Semiconductor Scaling (SemiEngineering) (4 mins )

Global Semiconductor Sales Increase 15.8% from Q2 to Q3 (Semiconductor Industry Association) (6 mins)

⚛️ Quantum

Should we build an optical interferometer on the moon? (Phys.org) (16 mins)

Princeton puts quantum computing on the fast track with new qubit (Princeton University) (9 mins)

⚡️ Photonic / Optical

New Investments Flowing Into Photonics—Part 1: Trends Pointing Upwards (All About Circuits) (8 mins)

New Investments Flowing Into Photonics—Part 2: Where Investors are Focused (All About Circuits) (7 mins)

Part 1 was originally published in September but is included here for context.

Frequency-stable nanophotonic microcavities via integrated thermometry (Nature Photonics) (33 mins)

Black Semiconductor: The graphene revolution that could redefine computing (IO Plus) (12 mins)

Conservative port-to-port funneling of light in nonlinear photonic lattices (Nature Communications) (27 mins)

🧠 Neuromorphic

Halide perovskite volatile unipolar Nanomemristor (EurekAlert!) (5 mins)

Neuromorphic Edge Analytics Market Outlook 2025 to 2035 (FactMR) (26 mins)

Neuromorphic Computing Market to Reach $9.4 B by 2032 (Newstrail) (12 mins)

💥 Data Centers

In-System Test For AI Data Centers (SemiEngineering) (15 mins – Video)

New Data Center Developments: November 2025 (Data Center Knowledge) (25 mins)

☁️ Cloud

Framework: EU’s Cloud Sovereignty SEAL Ranking Forces Governance and Resilience Trade-offs (InfoQ) (3 mins)

🤖 AI

Anthropic projects $70 B in revenue by 2028: Report (TechCrunch) (4 mins)

Moving AI Workloads To The Edge (SemiEngineering) (12 mins)

Principles of light transmission in optical arrays. A) Linear, lossless (unitary). B) Linear, with gain/loss. C) Nonlinear, forming optical funnel. Source: Nature.

Last week’s funding activity was moderate, led by a $110M Series B for EdgeCortix. Most rounds clustered in semiconductors, complemented by early-stage deals in quantum and data-center infrastructure.

The latest index highlights stabilizing costs for traditional builds, rising complexity and premiums for AI-ready facilities, and persistent inflation despite maturing global markets.

Stabilisation

Construction costs for traditional cloud data centers are stabilizing, with a 5.5% year-on-year increase versus 9% in 2024. Broader construction inflation has cooled to around 4.2%, and maturing supply chains are easing pressure in newer regions.

AI Premium

AI-ready, liquid-cooled data centers remain significantly more expensive—typically 7–10% higher than air-cooled builds—due to higher power density, technical complexity, and specialized cooling systems.

Indicative average percentage allocation of construction costs for air-cooled versus liquid-cooled data centres in the US. Source: Turner & Townsend.

Density

Higher power density allows smaller footprints and potential cost offsets. Mega-campuses designed for AI training can achieve economies of scale, while reduced redundancy requirements in some builds lower costs further.

Markets

Tokyo (US$15.2/W), Singapore (US$14.5), and Zurich (US$14.2) remain the most expensive markets. Paris, Amsterdam, Madrid, and Dublin are catching up as demand grows and supply chains mature, while Lagos has normalized after early setup cost spikes.

Data centre cost index 2025 – index scores and US$ per watt. Source: Turner & Townsend.

We hope you are able to zoom :-) We didn’t want to leave out this graphic, but couldn’t make it any bigger.

Source: Data centre construction cost index: 2025 – 2026 (Turner & Townsend)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Six potential scenarios for the future of quantum computing, outlining how the field could evolve from 2025 onward. From unscalable architectures and classical algorithm breakthroughs to fault-tolerant systems and disruptive quantum leaps that could reshape computing.

• Spotlights: The semiconductor industry closes in on the 400 Gb/s photonics milestone, and Thiel-funded U.S. startup Substrate raises $100 M to challenge ASML’s dominance in lithography tools.

• Headlines: Major semiconductor moves from GlobalFoundries, Qualcomm, and Nvidia, breakthroughs in quantum computing and space-based systems, progress in photonic and neuromorphic hardware, and large-scale expansions in data center, cloud, and AI infrastructure.

• Readings: Challenges in die stacking and multi-die reliability, advances in graphene and MEMS, momentum in quantum investment and algorithms, photonic microresonator breakthroughs, neuromorphic olfaction, and pitfalls in liquid cooling for data centers.

• Funding news: Financings across (computing-related) AI, photonics, semiconductors, and cooling, with several early-stage rounds and a few larger deals, including Substrate’s $100 M venture round and Fireworks AI’s $250 M Series C.

• Bonus: Highlights from NVIDIA’s GTC 2025, featuring new processors, hybrid quantum-classical interconnects, and open 6G software platforms. The company also unveiled a range of new products for AI data centers, networking, and industrial systems.

Quantum computing enters a decisive decade. Google’s Willow processor demonstrated below-threshold error correction with 105 qubits last December, IBM targets 200 logical qubits by 2028, and D-Wave continues to expand quantum annealing beyond 5,000 qubits. Yet the field remains divided between optimism and realism.

The following six scenarios outline how quantum computing could evolve from 2025 onward. They synthesize recent experimental results, corporate roadmaps, and fundamental research challenges.

Scenario 1 – Quantum Computing Proves Unscalable (Probability 5%)

Scaling to millions of qubits could prove impossible. Control electronics, cooling infrastructure, and error correction grow exponentially more complex, while data-loading and readout remain unsolved. Governments’ slow deployment of post-quantum cryptography and the small commercial market indicate limited confidence in near-term breakthroughs.

Summary: Quantum computing remains confined to research, sensing, and encryption niches.

Scenario 2 – Classical Algorithms Supersede Quantum (Probability 10%+)

Tensor-network methods now reproduce quantum results on conventional systems, even simulating IBM’s 127- and 433-qubit experiments. AI-driven algorithm design accelerates this trend, finding efficient classical alternatives for quantum circuits. As in past hardware revolutions, improved algorithms may narrow or eliminate quantum advantage.

Summary: Classical computing absorbs most benefits once expected from quantum, narrowing its practical relevance.

Scenario 3 – Quantum Scales but Underwhelms (Probability 1–10%)

Quantum systems continue to grow but deliver limited gains. Improvements of 10–30 percent in optimization or simulation are helpful but not transformative. Quantum memory and circuit depth remain constraints, and most demand comes from public funding rather than commercial users.

Summary: Quantum becomes a specialized accelerator for selected high-performance computing workloads.

Scenario 4 – Incremental Growth and Fault Tolerance Achieved (Probability 50%+)

Quantum computing progresses steadily rather than explosively, with consistent improvements in qubit fidelity, coherence, and error correction. Below-threshold error correction, demonstrated by Google’s Willow processor, confirms the foundation for scalable systems. IBM’s roadmap reinforces this trajectory, outlining a gradual path from current 133-qubit processors toward 200 logical qubits by 2028. Early use cases in chemistry, finance, and logistics already show measurable, if modest, advantages.

Summary: Quantum computing becomes a stable, enterprise-level complement to classical HPC.

2025 IBM Quantum Roadmap. Source: Quantum Zeitgeist.

Scenario 5 – NISQ Era Persists and Fault Tolerance Fails (Probability 10–20%)

Full fault tolerance may remain out of reach due to correlated errors and high overhead. Instead, companies refine noise-mitigation and hybrid workflows that deliver usable results. Applications in optimization, logistics, and quantum machine learning grow despite imperfect systems.

Summary: A “good-enough” quantum industry emerges, profitable but limited in scope and long-term impact.

Scenario 6 – Disruptive Growth and Quantum Breakthrough (Probability 30–40%)

A decisive breakthrough, whether through topological, photonic, or another yet-unknown qubit design, enables stable, large-scale quantum computation. AI-assisted algorithm discovery accelerates progress, delivering exponential speedups for complex problems. Massive public and private investment, global talent shifts, and corporate readiness programs converge, fueling expectations of rapid deployment once the technology matures.

Summary: A genuine breakthrough transforms materials science, pharmaceuticals, and cryptography, reshaping computing itself.

Source: Quantum Computing Future – 6 Alternative Views of the Quantum Future Post 2025 (Quantum Zeitgeist, 2025)

💥 Semiconductor Industry Closes in on 400 Gb/s Photonics Milestone (IEEE Spectrum)

“The optical links that help connect the computers densely packed inside data centers may soon experience pivotal upgrades. At least two companies, Imec and NLM Photonics, now say they have either achieved 400-gigabit-per-second per lane data rates, the next key goal for data centers, or have these speeds within sight. Moreover, instead of relying on exotic new technologies, the devices of both teams are based on silicon.

[…]

Silicon photonics was generally not thought capable of scaling to 400 Gb/s per lane due to energy efficiency and other factors, says Lewis Johnson, chief technology officer and co-founder of NLM Photonics in Seattle.”

🦾 US startup Substrate raises $100 M for development of lithography tools to challenge ASML (Data Center Dynamics)

“US startup Substrate claims to have developed a chipmaking tool that can compete with the advanced lithography tools manufactured by Netherlands-based ASML.

The company also announced it raised $100 million in a funding round, which valued it at $1 billion. The round saw participation from Peter Thiel’s Founders Fund, General Catalyst, Allen & Co., Long Journey Ventures, Valor Equity Partners, and the CIA-backed not-for-profit firm In-Q-Tel.”

Last week’s headlines featured major semiconductor moves from GlobalFoundries, Qualcomm, and Nvidia, breakthroughs in quantum computing and space-based systems, progress in photonic and neuromorphic hardware, and large-scale expansions in data center, cloud, and AI infrastructure.

🦾 Semiconductors

Skyworks Solutions and Qorvo to Combine to Create $22 Billion U.S.-Based Leader in High-Performance RF, Analog and Mixed-Signal Solutions (Skyworks)

GlobalFoundries plans €1.1 billion investment to expand chip manufacturing in Germany (GlobalFoundries)

Advantest Unveils MTe – Unified, Scalable Test Platform for Power Semiconductor Devices (Advantest)

Socionext Unveils “Flexlets™”, a Configurable Chiplet Ecosystem to Accelerate Multi-die Silicon Innovation (PR Newswire)

Qualcomm Unveils AI200 and AI250 — Redefining Rack-Scale Data Center Inference Performance (Qualcomm)

Scientists create new type of semiconductor that holds superconducting promise (New York University)

Nvidia becomes first public company worth $5 trillion (TechCrunch)

Critical chip shortage worsens by the day (ACEA)

⚛️ Quantum

99.9 %-Fidelity Quantum Computing: Optimization Overcomes Disorder, Achieving Required Pulse Accuracy (Quantum Zeitgeist)

Fault-Tolerant Quantum Computers Achieve ≈ 22 Years to 1 Day Runtime Reduction, Enabling Utility-Scale CO₂ Utilization (Quantum Zeitgeist)

2× 124-quantum-qubits performance: Digitized Counterdiabatic Quantum Sampling achieves efficient Boltzmann distributions & gains (Quantum Zeitgeist)

Quantum Optical Clock Demonstration on Underwater Autonomous Submarine a Step Toward GPS-Free Navigation (The Quantum Insider)

Keysight Advances Quantum Engineering with New System-Level Simulation Solution (Keysight)

Quandela delivers photonic quantum computer to EuroHPC and GENCI at CEA’s TGCC (Yole Group)

Optimizing Space Exploration – SemiQon Innovations Enhance Capabilities of Spaceborne Vehicles (The Quantum Insider)

Quantum’s promise for near- and long-term space applications (SpaceNews)

⚡️ Photonic / Optical

Engineers test photonic AI chips in space (Phys.org)

Superlight Photonics continues without founder (Bits&Chips)

🧠 Neuromorphic

Neuromorphic computer prototype learns patterns with fewer computations than traditional AI (TechXplore)

The UK Multidisciplinary Centre for Neuromorphic Computing officially launches at the House of Lords (EdTech Innovation Hub)

💥 Data Centers

Nvidia to deploy Emerald AI’s orchestration software at 96 MW Aurora data center in Manassas, Virginia (Data Center Dynamics)

DOE inks $1 B supercomputer deal to shape energy sector (E&E News)

Nvidia and Deutsche Telekom to build data center in Munich, Germany – report (Data Center Dynamics)

☁️ Cloud

Microsoft Azure outage analysis (Capacity Global)

AWS exceeds Wall Street’s expectations as demand for cloud infra remains high (TechCrunch)

📡 Networking

MITRE Announces AI-Native Spectrum Agility Prototype to Strengthen Telecom in America (MITRE)

New UWB application lab strengthens Infineon’s leadership in trusted connectivity system solutions (Infineon)

Nvidia makes $1 BN investment in Nokia (Tech.eu)

🤖 AI

NVIDIA and Partners Build America’s AI Infrastructure and Create Blueprint to Power the Next Industrial Revolution (NVIDIA)

Nvidia expands AI ties with Hyundai, Samsung, SK, Naver (TechCrunch)

Globally controlled superconducting qubit ladder with shared drive pulses and readout zones. Source: Quantum Zeitgeist.

This week’s reading list explores challenges in die stacking and multi-die reliability, graphene and MEMS in electronics, quantum investment and algorithms, photonic breakthroughs in microresonators, neuromorphic chips for olfaction, and pitfalls in liquid cooling for data centers.

🦾 Semiconductors

Lithography: How to Kill 2 Monopolies with 1 Tool (SemiAnalysis) (27 mins)

Greater China MEMS Industry On the Rise: Consumer Leads the Way (Yole Group) (9 mins)

Small Material, Big Impact: Graphene in Electronic Applications (IDTechEx) (12 mins)

Ensuring Reliability Becomes Harder In Multi-Die Assemblies (SemiEngineering) (25 mins)

Thermal, Mechanical, And Material Stresses Grow With Die Stacking (SemiEngineering) (33 mins)

You Can Cool Chips With Lasers?!?! (IEEE Spectrum) (9 mins)

⚛️ Quantum

Quantum technology investment hits a ‘magic moment’ (McKinsey) (23 mins)

IBM Research Unveils New Quantum Algorithm Leveraging Group Theory for Potential Speedups (Quantum Zeitgeist) (25 mins)

⚡️ Photonic / Optical

Analysis of 2024 Photonics breakthroughs: Microresonators advance electron-photon control (Open Access Government) (5 mins)

Photonics Market worth $1,481.80 billion by 2030 at 6.3% (MarketsandMarkets) (5 mins)

🧠 Neuromorphic

Neuromorphic olfactory perception chips: towards universal odour recognition and cognition (Nature Reviews Electrical Engineering) (5 mins)

High-entropy oxide memristors: a frontier for brain-inspired electronics (EurekAlert!) (6 mins)

United States Neuromorphic Computing Market 2025 | Growth Drivers, Key Players & Investment Opportunities (OpenPR) (10 mins)

💥 Data Centers

How to ruin a perfectly good liquid cooling system (Data Center Dynamics) (8 mins)

Global simulation (top), and thermal simulation for die (bottom left) and interposer (bottom right). Source: Semiconductor Engineering.

Last week’s financings spanned AI, photonics, semiconductors, and cooling. More than usual AI-related rounds were announced, with (as always) only those directly relevant to computing included here. Deals ranged from early-stage Seeds to a $250M Series C.

At last week’s GTC (“GPU Technology Conference”) - NVIDIA’s annual flagship event - the company announced a series of major updates spanning data processing, quantum integration, and physical AI systems.

Highlights include:

• BlueField-4 processor: A next-generation data processing unit combining Grace CPU and ConnectX-9 networking, delivering 800 Gb/s throughput to power large-scale AI factories.

• NVQLink: A new high-speed interconnect that links quantum processors with NVIDIA GPUs, enabling hybrid quantum-classical computing across 17 builders and 9 research labs.

• AI-RAN stack: AI-native 6G platform, now open-sourced to developers, serving as the software-defined foundation for programmable and intelligent wireless networks.

• Aerial software: A 6G application built on the Aerial platform, developed with U.S. telecom partners to enable AI-driven networks, improve spectrum efficiency, and speed up next-generation deployment.

• AI factory reference design: A blueprint for gigawatt-scale data centers aimed at modernizing government operations and securing national infrastructure.

• IGX Thor processor: A high-reliability edge AI platform for industrial automation, robotics, and medical systems, built to handle real-time physical-world data.

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: The emerging challenges of building hardware for Physical AI, and how bringing intelligence to the edge is redefining compute design, power efficiency, sensor integration, and real-world verification.

• Spotlights: NVIDIA and TSMC celebrate the first U.S.-made Blackwell wafer, and a global AWS outage exposes the fragility of cloud infrastructure and the geopolitics of digital resilience.

• Headlines: Major semiconductor moves from Tesla, Intel, and Arm, new quantum breakthroughs from IonQ and IBM, advances in photonic and neuromorphic chips, and major cloud partnerships led by Google and Anthropic.

• Readings: Advances in memory and cooling, scalable photonics for AI, quantum state preparation and storage, neuromorphic processing for edge and optical AI, and evolving strategies in data centers and cloud infrastructure.

• Funding news: A wave of smaller rounds below $10M across semiconductors, AI, and quantum, alongside a few larger deals including a $98M round in photonics and a $1.4B round in data centers.

• Bonus: Google’s new claim of quantum advantage triggers both excitement and scientific caution, as its Willow processor achieves a 13,000× speed-up while debate continues over practical impact.

Physical AI brings intelligence to the edge, from robots and drones to industrial systems, where machines must sense, interpret, and act in the physical world. These systems combine local inference with cloud connectivity and must make autonomous, real-time decisions using uncertain data and limited power.

This shift reshapes how computing hardware is built and verified, introducing five core challenges that are redefining hardware design for intelligence at the edge:

Challenge 1: Designing for Local Decision-Making and Low Power

Physical AI systems must make rapid, independent decisions under strict power limits without relying on the cloud for real-time processing.

• Technical implication: Edge processors must handle inference, control, and communication locally with predictable latency.

• Design consequence: Compute, memory hierarchy, and power management are co-optimized to achieve sub-millisecond response times within strict thermal and energy limits.

Challenge 2: Integrating AI Algorithms Into Hardware Design

Embedding evolving AI models into hardware requires balancing performance with adaptability as algorithms change over time.

• Technical implication: Chips must support pipelining, data preprocessing, and on-device learning while managing limited resources.

• Design consequence: Systems are built with configurable compute and memory blocks that allow new or larger AI models to run without reworking the entire chip.

Challenge 3: Managing Complex System Interactions

Physical AI devices operate as distributed systems that sense, process, and communicate continuously across multiple edge nodes.

• Technical implication: Synchronization, bandwidth, and latency must be managed across heterogeneous SoCs (System-on-a-Chip) that include CPUs, NPUs, and DSPs.

• Design consequence: Control and dataflow architectures are designed for deterministic operation to ensure coordination and reliability in safety-critical environments.

Challenge 4: Bridging Analog, Digital, and Mixed-Signal Worlds

Integrating sensors such as lidar, radar, and MEMS with digital compute pipelines introduces complexity across analog and digital domains.

• Technical implication: Mixed-signal integration makes it difficult to model and validate real-time behavior across sensing and computation layers.

• Design consequence: Orchestration frameworks and system-level simulation tools are developed to synchronize sensing, processing, and actuation efficiently.

Challenge 5: Verifying Performance in Real-World Environments

Physical AI systems must prove reliability not just in simulation but under real-world conditions such as temperature shifts, vibration, and human interaction.

• Technical implication: Hardware and AI models need continuous monitoring and validation once deployed in the field.

• Design consequence: Adaptive calibration and feedback mechanisms are embedded into the design to maintain accuracy, stability, and safety across changing operating conditions.

Outlook

Physical AI will accelerate hardware design activity across sectors including industrial, automotive, medical, and consumer applications. Each domain will demand customized chips optimized for specific environments, often built through modular, chiplet-based approaches that scale across product families. EDA (Electronic Design Automation), simulation, and emulation tools will need to evolve to handle these multi-die systems that operate, learn, and update continuously in the field.

Source: Multiple Challenges Emerge With Physical AI System Design (Semiconductor Engineering, 2025)

🦾 The Engines of American-Made Intelligence: NVIDIA and TSMC Celebrate First NVIDIA Blackwell Wafer Produced in the U.S. (NVIDIA)

“NVIDIA founder and CEO Jensen Huang today visited TSMC’s semiconductor manufacturing facility in Phoenix to celebrate the first NVIDIA Blackwell wafer produced on U.S. soil, representing that Blackwell has reached volume production.

Onstage at the celebration, Huang joined Y.L. Wang, vice president of operations at TSMC, to sign the Blackwell wafer, commemorating a milestone that showcases how the engines of the world’s AI infrastructure are now being constructed domestically.”

☁️ A global AWS outage exposes fragile digital foundations (Tech.eu)

“The problem has been attributed to Amazon’s AWS service, and triggered by a DNS resolution failure tied to the DynamoDB API endpoint in AWS’s US-East-1 (Northern Virginia) region, s with a flow on to thousands of services, including Amazon’s own services, such as Alexa, Ring and Prime Video, were experiencing problems, as well as big names from around the web.

One thing is clear: when so much of Europe’s digital infrastructure runs on a handful of American cloud providers, resilience becomes as much a geopolitical issue as a technical one. It exposes the fragility of global digital supply chains and the UK’s growing challenge in ensuring digital sovereignty and resilience.”

Last week’s headlines highlighted major semiconductor moves from Tesla, Intel, and Arm, new quantum breakthroughs from IonQ and IBM, advances in photonic and neuromorphic chips, and emerging space data center concepts.

🦾 Semiconductors

Tesla Unveils New AI5 Chip to Be Produced by Samsung and TSMC (MarketScreener)

The GAIN AI Act Will Undermine the Global Competitiveness of U.S. AI Chipmakers (CSIS)

With an Intel recovery underway, all eyes turn to its foundry business (TechCrunch)

NextSilicon’s Maverick-2 Powers AI and HPC Breakthroughs with up to 10× Performance Boost at Less Than Half the Power (Business Wire)

Infineon launches AURIX™ Configuration Studio to accelerate software development for AURIX devices (Infineon)

Arm Accelerates the Edge AI Revolution with Easy, Low-Cost Access to Armv9 Platforms through Arm Flexible Access (Arm)

New Standardized Semiconductor Cyber Assessment (SSCA) Strengthens Security and Collaboration Across Global Supply Chain (SEMI)

⚛️ Quantum

IonQ Achieves Landmark Result, Setting New World Record in Quantum Computing Performance (Oxford Ionics)

Forthcoming IBM Paper Expected to Show Quantum Algorithm Running on Inexpensive AMD Chips (The Quantum Insider)

Telecom at the Edge of Scale: How Quantum Technologies Are Recasting the Network Economy (The Quantum Insider)

U.S. Weighs Taking Equity Stakes in Quantum Computing Firms (The Quantum Insider)

QuTech Researchers Achieve Digital Control Breakthrough With Germanium Qubits (Quantum Zeitgeist)

UNSW Researchers Surpass 54 % Efficiency With Fiber-Coupled Quantum Memory (Quantum Zeitgeist)

⚡️ Photonic / Optical

“Rainbow-on-a-chip” could help keep AI energy demands in check — and it was created by accident (LiveScience)

🧠 Neuromorphic

Team develops high-speed, ultra-low-power superconductive neuron device (EurekAlert)

VSORA announces tape-out of game-changing inference chip, putting Europe at the forefront of data center AI (VSORA)

💥 Data Centers

How Will Crusoe and Starcloud Build Data Centres in Space? (Data Centre Magazine)

15 Years of OpenStack: How a Mars Satellite Revolutionized the Data Center (heise)

OpenAI, Oracle and Vantage plan Stargate Wisconsin data-center campus expected to be close to a gigawatt (Data Centre Dynamics)

☁️ Cloud

Google and Anthropic announce cloud deal worth tens of billions of dollars (CNBC)

Argyll and SambaNova Partner to Deliver the UK’s First Renewable-Powered Sovereign AI Cloud (Business Wire)

Expanding our use of Google Cloud TPUs and Services (Anthropic)

Hybrid fiber–optic quantum memory setup. Source: Quantum Zeitgeist.

This week’s reading list covers advances in memory and cooling, scalable photonics for AI, quantum state preparation and storage, neuromorphic processing for edge and optical AI, and evolving strategies in data centers and cloud infrastructure.

🦾 Semiconductors

Nanoimprint Lithography: Stop Saying It Will Replace EUV (SemiAnalysis) (39 mins)

Modulation of the Inner Gate Length in MFMIS NSFETs To Achieve Big Gains in Memory Window (SemiEngineering) (3 min)

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (SemiEngineering) (4 min)

What’s Different About HBM4 (SemiEngineering) (14 min)

Digital Twins For Packaging: Bridging Design, Fab, Test, And Reliability (SemiEngineering) (16 min)

Diamond Thermal Conductivity: A New Era in Chip Cooling (IEEE Spectrum) (11 mins)

⚛️ Quantum

IRID + AIMING: The Pure-Play Quantum Computing Stocks vs Tech Giants Defining the Next Computing Era (Quantum Zeitgeist) (27 mins)

Efficient Quantum State Preparation with Bucket Brigade QRAM Achieves Logarithmic Data Retrieval for Machine Learning Applications (Quantum Zeitgeist) (10 mins)

Quantum Entanglement Nodes: Storage Capacity with Erasure-Prone Assistance Achieves Maximum Size (Quantum Zeitgeist) (14 mins)

⚡️ Photonic / Optical

AI Factories: Photonics at Scale (Optics & Photonics News) (27 min)

Non-volatile tuning of cryogenic silicon photonic micro-ring modulators (Nature Communications) (42 mins)

🧠 Neuromorphic

Why In-Memory Computation Is So Important For Edge AI (SemiEngineering) (6 min)

Are Reservoirs and Ising Machines Neuromorphic? (EE Times) (5 min)

High-throughput optical neuromorphic graphic processing at millions of images (EurekAlert) (11 min)

Resonate-and-fire Photonic-Electronic Spiking Neurons Enable Ultrafast, Energy-Efficient Neuromorphic Processing (Quantum Zeitgeist) (11 min)

💥 Data Centers

Data Center Liquid Cooling – Market Size to Exceed US$40 billion by 2036 (IDTechEx) (5 min)

AI Data Center Forecast: From Scramble to Strategy (Bain & Company) (10 mins)

☁️ Cloud

What Does a ‘Sovereign Cloud’ Really Mean? (TechPolicy.Press) (17 min)

Global data center capacity by compute type. Source: Bain & Company.

Last week saw an unusually high number of sub-$10M rounds across semiconductors, AI, and quantum. Activity above that level was limited to a few larger deals, including a $98M round in photonics and Crusoe’s $1.4B Series E in data centers.

Google’s breakthrough claim

Google has announced what it calls the first verifiable quantum advantage, showing that its Willow quantum processor can run a real algorithm on hardware 13,000× faster than the fastest classical supercomputers. The new Quantum Echoes algorithm was used to compute the structure of a molecule, and Google says it opens a path toward real-world applications in medicine and materials science.

The result, published in Nature, builds on six years of work: the 2019 “quantum supremacy” experiment proving raw speed and the 2024 Willow chip, which dramatically suppressed errors that had limited quantum hardware for decades.

Scientific caution

However, many scientists remain cautious. The algorithm has so far been applied only to relatively simple molecules that can already be simulated classically, and there is still no formal proof that an equally fast classical method does not exist. Several researchers argue that claims of “quantum advantage” should meet a high standard of evidence.

Others point out that Google’s projected five-year horizon for practical applications seems ambitious, even if the underlying progress in error suppression and algorithm design is widely acknowledged as an important step forward.

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: The third part of our advanced packaging series examines how rising chiplet power and 3D stacking create thermal bottlenecks, and the new materials and cooling technologies needed to address them.

• Spotlights: Apple’s new M5 chip, delivering a major leap in AI performance and efficiency, and Nvidia’s growing role as a leading investor in the AI ecosystem.

• Headlines: Major semiconductor updates from Intel, Arm, and AMD, breakthroughs in quantum and photonics from China and Europe, advances in neuromorphic, and record data center and infrastructure deals.

• Readings: Shifts in the memory market, advances in semiconductor metrology, broadband quantum memory, edge photonic circuits, neuromorphic hardware trends, and new approaches to cooling and power efficiency in AI data centers.

• Funding news: A quieter week overall, with fewer large rounds than usual. Activity centered on early-stage quantum and photonics startups, while semiconductors led in scale with Tachyum’s $220M Series C.

• Bonus: Key highlights from the Open Compute Project (OCP) Summit in San Jose, where open standards and modular architectures are setting the direction for next-generation AI infrastructure.

Check out our website for the Future of Computing Conference in Paris on November 6 to see the full agenda and pitching startups. If you’d like to join us, you can sign up here ❤️

This deep dive is the third part of our exploration of advanced packaging. In the first edition, we covered the fundamentals: why packaging matters, what drives its adoption, and the most recent innovations in the field.

The second part examined how advanced packages are organized through 2D, 2.5D, and 3D integration, along with the role of interposers in enabling these dense chip-to-chip links.

With part of the architectural complexity now established, this part turns to thermal management: the physical constraint that increasingly defines what advanced packaging can realistically support. As chiplets stack and power densities rise, managing heat has become a primary limiter, not a secondary engineering task.

Thermal Challenges

• Rising Chiplet Power Density: Increased transistor concentration within individual chiplets creates localized heat, shifting the challenge from overall package power to concentrated thermal hotspots.

• Stacking and Reduced Heat Paths: Vertical die stacking limits surface area for heat extraction and increases thermal resistance to the cold plate, resulting in higher thermal density within the stack.

• Heterogeneous Layout Tradeoffs: Integrated compute, memory, and power IP produce different thermal profiles, requiring tradeoffs, as improving thermals in one region can worsen conditions in another under variable workloads.

• High-Speed IO in Base Dies: Higher power densities in IO blocks (input/output interfaces), when placed in base die layers, face increased dissipation difficulty due to interconnect and dielectric barriers.

• Thinner Silicon and Interface Sensitivity: Silicon thinning (from roughly 700 µm to 50 µm) reduces lateral heat spreading and increases sensitivity to thermal defects.

Thermal Requirements

• Thermal Interface Materials (“TIMs”): Current efforts focus on lowering thermal resistance at critical interfaces within the package. Looking ahead, requirements include up to a 50% reduction and a transition toward embedded cooling without traditional interface materials.

• Heat Spreaders: Materials with higher thermal conductivity than copper are needed, while maintaining manufacturability. Over time, these spreaders must integrate directly into stacked architectures rather than sitting above them.

• Cooling Solutions: System-level cooling is shifting from air-based CRAC (Computer Room Air Conditioning) units toward direct liquid cold plates at the package. Future approaches include above-ambient and sub-ambient cooling, ultimately requiring heat removal from within stacked dies.

• Metrology: Future thermal solutions require non-destructive measurement with approximately 3 °C accuracy to characterize thermal behavior across bonded layers, including x-y-z conductivity (across horizontal and vertical heat paths).

• Modeling: Multiphysics thermal modeling is needed to simulate conductivity and heat flow in stacked architectures, capturing material interactions and enabling design validation before fabrication.

Thermal management requirements. Source: MAPT.

Thermal management has shifted from a packaging afterthought to a determining factor in system architecture. As transistor counts and stack depths increase, managing localized heat becomes as critical as delivering power or routing signals. Future compute systems will depend on co-design of cooling, materials, and workload profiles, making thermals a central pillar of advanced packaging.

Source: Chapter 7 – Advanced Packaging and Heterogeneous Integration (MAPT, 2025)

🦾 Apple unleashes M5, the next big leap in AI performance for Apple Silicon (Apple)

“Apple today announced M5, delivering the next big leap in AI performance and advances to nearly every aspect of the chip. Built using third-generation 3-nanometer technology, M5 introduces a next-generation 10-core GPU architecture with a Neural Accelerator in each core, enabling GPU-based AI workloads to run dramatically faster, with over 4x the peak GPU compute performance compared to M4. The GPU also offers enhanced graphics capabilities and third-generation ray tracing that combined deliver a graphics performance that is up to 45 percent higher than M4. M5 features the world’s fastest performance core, with up to a 10-core CPU made up of six efficiency cores and up to four performance cores.”

🤖 Nvidia’s AI Empire: A Look at Its Top Startup Investments (TechCrunch)

The article outlines how Nvidia has rapidly expanded its role as an AI investor, using its record profits to take stakes in leading startups. It explains Nvidia’s stated goal of backing “game changers and market makers” and lists the major million- to billion-dollar rounds it has joined since 2023 including xAI, Mistral AI, Reflection AI, Thinking Machines Lab, and Figure AI.

Last week’s headlines featured major semiconductor and AI hardware moves, breakthroughs in quantum and photonic computing, advances in neuromorphic systems, and record deals reshaping global data center infrastructure.

🦾 Semiconductors

Super-thin semiconductor overcomes trade-off between speed and thermal stability (TechXplore)

Scientists smash record in stacking semiconductor transistors for large-area electronics (EurekAlert)

Arm and Meta Deepen Strategic Partnership to Power the Next Era of AI, from Megawatts to Milliwatts, for Billions Worldwide (Arm)

Oracle and AMD Expand Partnership to Help Customers Achieve Next-Generation AI Scale (AMD)

Intel to Expand AI Accelerator Portfolio with New GPU (Intel)

OpenAI and Broadcom partner on AI hardware (TechCrunch)

⚛️ Quantum

China Mass Produces World’s First Four-Channel Photon Detector in October 2025 (Quantum Zeitgeist)

Quantum Computers Demonstrate Noise-Induced Discrete Time Crystals and Boundary-Protected Thermalization Slowdown (Quantum Zeitgeist)

New Low-Cost, Efficient Single-Photon Source for Powering Future Quantum Internet (The Quantum Insider)

China Opens Its Superconducting Quantum Computer for Commercial Use (The Quantum Insider)

Researchers Achieve Atomic-Scale Control of Quantum State Manipulation (Phys.org)

Anomalous Metal Sheds Light on 'Impossible' State Between Superconductivity and Insulation (Phys.org)

Infineon’s PQC-certified contactless and dual-interface security controller – another step towards a quantum-safe world (Infineon)

⚡️ Photonic / Optical

Photonica 2025: Showcasing Europe’s brightest photonics startups in Munich (EU-Startups)

ANELLO’s silicon photonics optical gyroscope is enabling GPS-free navigation (GPS World)

🧠 Neuromorphic

Scientists Create Nanofluidic Chip with 'Brain-like' Memory Pathways (Phys.org)

Resonate-and-fire Photonic-Electronic Spiking Neurons Enable Ultrafast, Energy-Efficient Neuromorphic Processing (Quantum Zeitgeist)

Mercedes-Benz Vision Iconic Breaks Cover, Has Level 4 Automation, Neuromorphic Computing (Autoevolution)

💥 Data Centers

Infineon Advances Leading-Edge 800 Volt AI Data Center Power Architecture (Infineon)

Nscale eyes IPO amid fresh $14 billion deal with Microsoft (CNBC)

Aligned Data Centers sold to BlackRock and MGX in record-breaking $40 bn deal (Data Center Dynamics)

How Starcloud Is Bringing Data Centers to Outer Space (NVIDIA)

And again: Read more about Starcloud in our recent interview!

📡 Networking

Broadcom Introduces Industry’s First 800G AI Ethernet NIC (Broadcom)

Broadcom Introduces Industry’s First WiFi-8 Silicon Ecosystem Powering the AI Era (Broadcom)

NVIDIA Spectrum-X Ethernet Switches Speed Up Networks for Meta and Oracle (NVIDIA)

Upscale AI Unveils SkyHammer Architecture (Upscale AI)

🤖 AI

Anthropic aims to nearly triple annualized revenue in 2026 (Reuters)

New Low-Cost, Efficient Single-Photon Source for Powering Future Quantum Internet. Source: Quantum Insider.

This week’s reading list covers shifts in the memory market, advances in semiconductor metrology, broadband quantum memory, edge photonic circuits, neuromorphic market trends, and new approaches to power and cooling in AI data centers.

🦾 Semiconductors

Samsung Reclaims Global Memory Market Top Spot in Q3 2025 Driven by Robust DRAM, NAND Demand (Counterpoint Research) (13 mins)

Metrology’s Growing Role in Reducing False Defects (Semiconductor Engineering) (19 mins)

Distinctive features of structural evolution and thermodynamic response in wide-bandgap semiconductors driven by intense electronic excitation (ScienceDirect) (12 mins)

Ranked: The Top U.S. Semiconductor Companies by Market Cap (Visual Capitalist) (5 mins)

⚛️ Quantum

Fiber-coupled broadband quantum memory for polarization-encoded photonic qubits (Nature Quantum Information) (43 mins)

Rare-Earth Minerals and Quantum Computing: How Secure Are the Supply Chains? (The Quantum Insider) (17 mins)

⚡️ Photonic / Optical

Frequency-modulated high-power photonic-crystal surface-emitting lasers for long-distance coherent free-space optical communications (Nature Photonics) (36 mins)

What are the applications for photonic integrated circuits on the edge? (EE World Online) (9 mins)

🧠 Neuromorphic

Global Neuromorphic Hardware Market Size, Future Outlook By 2025-2034 (Market.us) (24 mins)

💥 Data Centers

Two-Phase Liquid Cooling: The Future of High-End GPUs (IDTechEx) (6 mins)

Data Centers Boost Voltage For Higher Efficiency (Semiconductor Engineering) (13 mins)

Are Flow Batteries the Answer for Data Center Energy Storage Needs? (Data Center Dynamics) (9 mins)

Improving AI Efficiency in Data Centres (Power Dynamic Response) (23 mins)

Global Neuromorphic Hardware Market Size, Future Outlook By 2025-2034. Source: Market.us.

Last week’s financings were concentrated in quantum and semiconductors with fewer large-scale rounds than usual. Quantum saw a series of early-stage rounds, while semiconductors dominated in scale with Tachyum’s $220M Series C.

This week’s OCP Summit in San Jose showcased how open hardware standards are now guiding the future of AI infrastructure. Instead of proprietary systems, the industry is aligning around shared blueprints for rack power, chiplet integration, and Ethernet-based interconnects. Below are the key developments that signal where hyperscale infrastructure is heading:

Open Standards & Infrastructure Blueprints

Realizing the Open Data Center Ecosystem Vision (Open Compute Project)

ARM Sets the Standard for Open Converged AI Data Centers (ARM)

Introducing eSun: Advancing Ethernet for Scale-Up AI Infrastructure at OCP (Open Compute Project)

Chiplet & Modular Silicon Ecosystem

Open Compute Project Expands Open Chiplet Economy Ecosystem (Open Compute Project)

Power, Racks & Efficiency Platforms

AMD Showcases “Helios” Rack-Scale Platform Built on the Open Compute Project Open Rack for AI (AMD)

NVIDIA, Partners Drive Next-Gen Efficient Gigawatt AI Factories in Buildup for Vera Rubin (NVIDIA)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: The physics behind the 2025 Nobel Prize and how the laureates showed that quantum effects can appear in classical systems, demonstrating tunnelling and quantised energy in a hand-sized circuit, laying the groundwork for today’s superconducting qubits and quantum sensors.

• Spotlights: NTT’s creation of the world’s first programmable nonlinear photonics chip, a breakthrough that kills the “one device, one function” rule, and Cerebras clarifying its IPO withdrawal after it’s $1.1B round.

• Headlines: Semiconductor updates from Intel’s new processor architecture to EU policy moves, breakthroughs in continuous-operation quantum computing, and progress across photonics, neuromorphic systems, data centers, and cloud.

• Readings: AI-driven semiconductor trends, quantum use cases for memristors, programmable photonic architectures, neuromorphic applications in sensing, and the next wave of connectivity with 5G-A and 6G.

• Funding news: Last week’s funding centered on early-stage rounds in AI, cloud, semiconductors, and quantum, with Reflection AI’s $2B Series B highlighting the widening gap between infrastructure plays and platforms.

• Bonus: The AI chip race turned circular: OpenAI is buying billions in AMD GPUs using AMD’s own stock while continuing major deals with Nvidia. The moves give OpenAI stakes and supply from both chipmakers.

The Nobel Discovery

Last week, the 2025 Nobel Prize in Physics was awarded to John Clarke, Michel Devoret, and John Martinis “for the discovery of macroscopic quantum mechanical tunnelling and energy quantisation in an electric circuit.”

The laureates proved that even in the world of classical physics, quantum effects can be observed. Their experiments demonstrated both 1) quantum tunnelling and 2) quantised energy levels in a system large enough to be held in the hand.

The Experiment That Proved It

The breakthrough was achieved in 1984–1985 at the University of California, Berkeley, where the team built an electrical circuit made of two superconductors separated by a thin insulating barrier, known as a Josephson junction.

When cooled to near absolute zero, electrons in the superconductors form Cooper pairs that move collectively as a single quantum system. The researchers observed that this system could tunnel through an energy barrier, switching from a zero-voltage state to one with a measurable voltage, providing direct evidence of macroscopic quantum tunnelling.

By introducing microwaves at controlled frequencies, the researchers further demonstrated that the system exhibited quantised energy levels, absorbing and emitting energy only in discrete amounts as predicted by quantum theory.

Experimental setup showing the superconducting circuit with a Josephson junction. Source: Royal Swedish Academy of Sciences.

How Their Discovery Shapes Today’s World

The Josephson junctions used in the Nobel-winning experiments became the basis of superconducting qubit quantum computers. In these systems, quantum information is encoded in the discrete energy states of superconducting circuits. Such circuits (often described as artificial atoms) absorb and emit energy in quantised amounts, exactly as predicted by quantum theory.

In addition, the discovery laid the groundwork for technologies such as quantum sensors capable of detecting extremely small magnetic fields, ultra-precise measurement tools, and secure quantum communication methods.

The Concepts Explained

Quantum tunnelling: A quantum effect in which a particle crosses an energy barrier that it cannot overcome according to classical physics. It occurs because particles have wave-like properties, allowing their probability waves to extend into and beyond regions that would normally be inaccessible. This makes it possible for them to appear on the other side of the barrier and underlies processes such as radioactive decay and nuclear fusion.

Quantised energy levels: The principle that a quantum system can occupy only specific, discrete energy states rather than a continuous range, absorbing or emitting energy only in fixed amounts. This principle explains phenomena such as atomic spectra and the operation of lasers.

llustration of how Cooper pairs form and move collectively across a Josephson junction. Source: Royal Swedish Academy of Sciences.

For those that want to explore the underlying physics in more detail, the “Scientific Background” paper offers an excellent deep dive into the experiments and theory.

Sources: Scientific Background; Popular Science Background; Press Release (Royal Swedish Academy of Sciences - Nobel Prize, 2025)

⚡️ NTT Create World’s First Programmable Nonlinear Photonics Chip (Quantum Zeitgeist)

“NTT Research announced that it […] has created the world’s first programmable nonlinear photonic waveguide. The device can be reconfigured in real-time to perform any of several nonlinear-optical functions, such as second-harmonic generation, arbitrary pulse shaping, or holographic light synthesis, by projecting a structured light pattern onto a silicon-nitride core. The breakthrough […] promises to break the long‑standing “one device, one function” rule that has constrained photonic engineering for decades.
[…]
‘These results mark a departure from the conventional paradigm of nonlinear optics, where device functions are permanently fixed during fabrications,’ said Ryotatsu Yanagimoto, a scientist at NTT Research. , Ryotatsu Yanagimoto, NTT Research.
[…]
NTT’s announcement comes at a time when the photonic‑integrated‑circuit market is projected to surpass $50 billion by 2035, according to IDTechEx. The new programmable waveguide could accelerate this growth by reducing the number of discrete components required in a system.”

Further technical details can be found in the Nature publication “Programmable on-chip nonlinear photonics.” 

🦾 Cerebras CEO Explains IPO Withdrawal, Says AI Chipmaker Still Intends to Go Public (CNBC)

Two weeks ago, Cerebras Systems secured $1.1B and shortly after withdrew its IPO plans, only to clarify last week that the move was meant to update its financials and strategy before refiling, with the IPO still on track.

“Cerebras CEO Andrew Feldman admitted that his artificial intelligence chipmaker made a mistake last week when it didn’t immediately explain its decision to withdraw its registration for an initial public offering. […] ‘Given that the business has improved in meaningful ways we decided to withdraw so that we can re-file with updated financials, strategy information including our approach to this the [sic] rapidly changing AI landscape,’ Feldman wrote.”

Last week’s headlines covered major semiconductor updates from new architectures to EU policy moves, advances in quantum and photonic computing, progress in neuromorphic systems, next-gen data center plans, and new cloud and AI partnerships.

🦾 Semiconductors

Qualcomm acquires Arduino to supercharge the global maker movement (Tech.eu)

Intel Unveils Panther Lake Architecture: First AI PC Platform Built on 18A (Intel)

Atomic Neighborhoods in Semiconductors Provide New Avenue for Designing Microelectronics (Berkeley Lab)

Driving Yield at Scale: Fabtex Yield Optimizer Improves Processes for High-Volume Manufacturing (Lam Research)

Applied Materials Unveils Next-Gen Chipmaking Products (Applied Materials)

Imec launches 300 mm GaN program to develop power devices (Imec)

SEMI Reports Global 300 mm Fab Equipment Spending Expected to Total $374 Billion Over Next Three Years (SEMI)

Nvidia to invest in Musk’s xAI as part of $20 billion funding (Japan Times)

EU unveils new measures to curb semiconductors dependence on non-EU countries (European Commission)

⚛️ Quantum

Harvard Researchers Develop First Ever Continuously Operating Quantum Computer (The Harvard Crimson)

IBM Unveils AI-Driven Cryptography Manager to Tackle Quantum Data Risks (The Quantum Insider)

Slimed: Slime Molds Fail Quantum Test But Offer Clues For Living Electronics (The Quantum Insider)

IonQ Completes Acquisition of Vector Atomic (The Quantum Insider)

Chip-based Phonon Splitter Brings Hybrid Quantum Networks Closer to Reality (The Quantum Insider)

⚡️ Photonic / Optical

Lithium Niobate Integrated Photonics Enables First Electrically Pumped, Self-Starting Passive Mode-Locked Laser (Quantum Zeitgeist)

Enlighten: Framework Lightens Transformers, Enabling Efficient Optical Acceleration (Quantum Zeitgeist)

Photonic Systems Support Up to 3D Channels, Predictively Bounding Singular Values for Information (Quantum Zeitgeist)

🧠 Neuromorphic

The Netherlands aims to lead brain-inspired computing development (IO⁺)

💥 Data Centers

China’s New Underwater Data Centers Could Slash Power by Up to 90% (ScienceAlert)

This Meta alum has spent 10 months leading OpenAI’s nationwide hunt for its Stargate data centers (CNBC)

Jeff Bezos claims there will be gigawatt data centers in space in 10 years (Data Center Dynamics)

If you’d like to learn more about data centers in space, check out our interview with Starcloud!

☁️ Cloud

SAP and Google Cloud Redefine Enterprise AI with Zero-Copy Data for Google BigQuery (SAP News)

🤖 AI

Anthropic and IBM Partner in Bid for AI Business Customers (The Wall Street Journal – Paywall)

“Demonstration of Fabtex Yield Optimizer, saving fabs multiple weeks to achieve targeted yields and amounting to significant cost savings.” Source: Lam Research.

This week’s reading list features AI-driven chip trends, quantum use cases for memristors, programmable photonic architectures, neuromorphic applications in sensing, and the next wave of connectivity with 5G-A and 6G.

🦾 Semiconductors

AI as the Semiconductor Growth Engine — White Paper (Vol. 1: Memory & Computing) (Yole Group) (10 mins)

Global Glass Substrates for Semiconductors Market Report 2026-2036 (Yahoo Finance) (7 mins)

Advanced Electronics Technologies for AI Research Report 2026-2036 (BusinessWire) (8 mins)

⚛️ Quantum

What Are Memristors — And Why Do They Matter for Quantum Computing (The Quantum Insider) (7 mins)

Honeywell’s Computing Legacy: From Mainframes to Quantum Supremacy (Quantum Zeitgeist) (35 mins)

⚡️ Photonic / Optical

Nonlocality-enabled photonic analogies of parallel spaces, wormholes and multiple realities (Nature Communications) (47 mins)

Programmable space-frequency linear transformations in photonic interlacing architectures (Scientific Reports) (49 mins)

🧠 Neuromorphic

Sumeet Kumar, Co-founder and CEO of Innatera – Interview Series (Unite.AI) (10 mins)

A Theoretical Framework for Neuromorphic Technology? (EE Times) (56 mins – Podcast)

Boosting microparticle tracking with neuromorphic cameras by optical modulation (Scientific Reports) (65 mins)

💥 Data Centers

The Data Center Dividend (McKinsey) (5 mins)

Top 10: Trends in Cloud Computing (Technology Magazine) (21 mins)

📡 Connectivity

6G and AI: How Wireless Technology and Edge Devices Are Shaping the Global AI Race (CSIS) (12 mins)

5G-A Evolution & Why It Matters (Counterpoint Research) (12 mins)

Chart illustrating the “data center dividend”. Source: McKinsey.

Last week’s funding leaned toward early-stage rounds across AI, cloud, semiconductors, and quantum. The clear outlier was Reflection AI’s $2B Series B, highlighting the widening gap between large platform bets and smaller infrastructure plays.

The AI chip race just got very circular: OpenAI is buying billions worth of AMD GPUs, using AMD’s own stock to pay for them. The deal gives OpenAI up to a 10% stake in AMD and secures AMD a flagship customer in the AI boom. It’s a financial loop: chips, equity, and hype feeding back into each other, all while powering OpenAI’s 23-gigawatt data-center buildout.

AMD to Supply 6 GW of Compute Capacity to OpenAI in Chip Deal Worth Tens of Billions (TechCrunch)

Wall Street Analysts Explain How AMD’s Own Stock Will Pay for OpenAI’s Billions in Chip Purchases (TechCrunch)

AMD Stock Skyrockets 23% as OpenAI Looks to Take Stake in AI Chipmaker (CNBC)

More articles on the circular deals among OpenAI, NVIDIA and AMD:

Nvidia, Huang, AMD, and OpenAI: Collaboration & Competition (CNBC)

OpenAI’s Nvidia, AMD deals boost $1 trillion AI boom with circular deals (Bloomberg- Paywall)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Following last week’s overview, we examine how advanced packaging uses 2D, 2.5D, and 3D integration to organize chips within packages, and how interposers enable dense, power-efficient connectivity between them.

• Spotlights: Nscale’s $433M follow-on round days after its $1.1B funding, and a new report projecting a 46.8% CAGR for the neuromorphic chip market as brain-inspired computing moves toward commercial adoption.

• Headlines: Geopolitical shifts in the global chip race, hybrid memory, a new €300M quantum fund, advances in photonics and neuromorphic computing, and major developments across data centers, cloud, and AI.

• Readings: Developments in AI co-processors, quantum entanglement explained, China’s photonics ambitions, wafer-scale neuromorphic fabrication, and new approaches to AI models using sparse attention.

• Funding news: Later-stage financings dominated the week, led by Cerebras Systems’ $1.1B round (after which it withdrew it’s IPO plans), alongside active deals in semiconductors, cloud, photonics, and quantum.

• Bonus: Europe’s Chips Act 2.0 initiative gathers momentum as all 27 EU member states call for semiconductors to be treated as a strategic industry on par with aerospace and defence.

Last week we covered the fundamentals of advanced packaging: why it matters, what drives adoption, which package types have become essential, and recent developments such as heterogeneous integration, new bonding methods, and thermal management solutions.

This week, we focus on two other critical topics: advanced package-level integration (2D, 2.5D, and 3D stacking) and interposers. Together, they form the foundation for how chips are organized within packages and linked through dense interconnects.

Package-Level Integration: Arranging Multiple Chips

New integration methods redefine how chips are connected within a package, enabling higher performance and efficiency:

2D Packaging

• Purpose: The baseline approach where a die is mounted directly on the substrate, mainly for low-cost and mature applications.

• Advantages: Simple, inexpensive, and well established.

• Limitations: Bandwidth is restricted and scaling options are limited, making it unsuitable for high-performance designs.

2.5D Packaging

• Purpose: Places multiple dies side by side on an interposer (explained below) to enable wider, faster interconnects between them.

• Advantages: Provides high bandwidth and is less complex than full 3D stacking. Widely used for integrating processors with HBM memory.

• Limitations: Interposers add cost and design complexity and can introduce thermal challenges.

Note: Although HBM (High Bandwidth Memory) is itself a 3D-stacked memory device, at the package level it is typically integrated alongside a processor on an interposer. This makes its overall configuration part of a 2.5D package.

3D Packaging

• Purpose: Stacks dies vertically and connects them using through-silicon vias (TSVs) and microbumps for the shortest possible interconnects.

• Advantages: Delivers the highest density and performance, with very high bandwidth and low power per bit. Key for memory and cache.

• Limitations: Thermal management is difficult because heat accumulates in the stack. Yields can be lower and costs higher.

In practice, real-world designs often combine 2.5D and 3D approaches, for example, compute chiplets and I/O chiplets arranged next to stacked memory. This mix is sometimes referred to as 3.5D.

HBM 3D stack with 2.5D integration. Source: SemiEngineering.

Interposers: Adding a Layer of Connectivity

As chips demand thousands of connections, routing all signals directly on organic substrates (the base layers that mechanically support the package and provide wiring to the circuit board) becomes impractical.

Interposers, the key enabling component in package-level integration discussed above, add an intermediate connection layer between the dies (the individual silicon chips) and the substrate.”

Interposers bring four main advantages over package substrates and printed circuit boards (PCBs):

• Enables higher routing density, allowing a larger number of fine-pitch connections.

• Keeps more die-to-die interconnects within the package rather than routing through the PCB.

• Provides shorter connection paths, which improve signal integrity and reduce latency.

• Reduces the required drive strength, lowering overall power consumption per signal.

The tradeoffs are cost, thermal management, and design complexity. For example, HBM must sit close to processors for speed, but DRAM is heat-sensitive, so placement can create reliability risks.

Structure of an interposer. Source: SemiEngineering.

Source: Advanced Packaging Fundamentals (SemiEngineering, 2025)

💥 Nscale closes $433M round, days after bagging $1.1BN funding (Tech.eu)

“Nscale, the UK-based AI data centre startup, has closed a $433 million funding round, just days after bagging a $1.1 billion funding round, as the vast investment in AI infrastructure shows no signs of abating.

Nscale, which pitches itself as a "hyperscaler engineered for AI", was named as a key local AI infrastructure partner for OpenAI, Microsoft and Nvidia, which announced significant investments into the UK AI ecosystem last week, coinciding with the visit of President Trump.”

🧠 Neuromorphic Chip Market Size Is Expected to Grow at a CAGR of 46.80% by 2032 (NewsTrail)

The neuromorphic chip market, focused on brain-inspired processors that enable fast, low-power, real-time learning, is projected to grow from USD 97.3 million (2023) to USD 3.06 billion by 2032, at a CAGR of 46.8% (2024–2032). Growth is driven by rising demand for AI, robotics, autonomous systems, and edge computing, where efficiency and real-time decision-making are critical.

Challenges include high R&D costs, limited software standardization, and integration hurdles, while opportunities lie in advancements in medical imaging, brain-computer interfaces, driver assistance, IoT, and smart city infrastructure.

The long-term outlook is highly positive as neuromorphic chips move from experimental to commercial use, becoming a core element of next-generation intelligent systems and enabling advances in autonomous technologies, real-time analytics, and adaptive computing.

Last week’s headlines covered semiconductor moves from new AI hardware to hybrid memory and chiplet advances, continued momentum in quantum and photonics, breakthroughs in neuromorphic tech, updates in data centers and cloud, new 6G tools, and AI model launches.

🦾 Semiconductors

Taiwan will not agree to 50-50 chip production deal with US, negotiator says (Reuters)

Huawei Plans Three-Year Campaign to Overtake Nvidia in AI Chips (Bloomberg – Paywall)

Sources: Naveen Rao’s new AI hardware startup targets $5B valuation with backing from a16z (TechCrunch)

Meta acquires RISC-V chip startup Rivos – report (Data Center Dynamics)

French Team Led by CEA-Leti Develops First Hybrid Memory Technology Enabling On-Chip AI Learning and Inference (CEA-Leti)

Alphawave Semi Delivers Cutting-Edge UCIe Chiplet IP on TSMC 3DFabric Platform (Alphawave Semi)

Cerebras Withdraws IPO Plans (CNBC)

⚛️ Quantum

55 North Announces First Close For €300 Million Quantum Technology Fund (The Quantum Insider)

Quantum Oscillations Realize Tunable Transitions Between Excitonic and Quantum Spin Hall Insulators in Moiré WSe2 (Quantum Zeitgeist)

Path to Utility Scale for Diraq’s Quantum Chips (Quantum Zeitgeist)

Scientists Create Carbon Nanotube-based Superconducting Quantum Bit (The Quantum Insider)

Scientists Explore New Spin on Quantum Computing (The Quantum Insider)

PsiQuantum Breaks Ground on America’s Largest Quantum Computing Project in Chicago (PsiQuantum)

ESA Continues to Bet Big on Quantum Comms (Payload Space)

⚡️ Photonic / Optical

Photonics leaders call for a €2 bn EU program to ‘keep Europe competitive’ (Optics.org)

Alchip and Ayar Labs Unveil Co-Packaged Optics for AI Datacenter Scale-Up (Ayar Labs)

‘Photonic crystal highway’ guides light forward on chips (Laser Focus World)

🧠 Neuromorphic

UMass Engineers Create First Artificial Neurons That Could Directly Communicate With Living Cells (UMass Amherst)

💥 Data Centers

Rick Perry’s data center REIT Fermi cashes in on AI frenzy, valued at $15B in IPO (Yahoo Finance)

Infineon Presents First High-Density Trans-Inductance Voltage Regulator (TLVR) Power Modules Optimized for AI Data Centers (Infineon)

Nokia Strengthens Leadership in AI-Ready Data Center Networks with Successful End-to-End Ultra Ethernet Test Across Data Center Switch Family (Nokia)

GlobalFoundries and Corning Collaborate To Deliver Detachable Fiber Connector Solutions to Scale Next-Generation Optical Connectivity (GlobalFoundries)

☁️ Cloud

SAP Sovereign Cloud Mindset Even More Valuable than $22 Billion Investment (Cloud Wars)

How Huawei Plans to Open Its Cloud AI Software Stack for Multi-Vendor Deployment (Cloud Computing News)

📡 Connectivity

Keysight Unveils 3GPP AI Simulation Platform to Accelerate AI-Enabled 6G Communications (Keysight)

🤖 AI

Ex-OpenAI CTO Mira Murati introduces Tinker, an API for fine-tuning of open-weight LLMs (The Decoder)

DeepSeek releases ‘sparse attention’ model that cuts API costs in half (TechCrunch)

“Schematic of a Diraq two-qubit device on a 300mm wafer, showing the full wafer, single die and single device level”. Source: Quantum Zeitgeist.

This week’s reading list includes developments in AI co-processors and packaging, quantum entanglement explained, China’s photonics ambitions, large-scale neuromorphic fabrication, smarter edge data center design, and new approaches to long-context AI models.

🦾 Semiconductors

The Rise of AI Co-Processors (SemiEngineering) (16 mins)

Smarter Packaging: How AI is Reshaping Assembly and Materials Control (SemiEngineering) (25 mins)

Global Semiconductor Foundry Market Share (Counterpoint Research) (5 mins)

Report: Global Processor Market (Yole Group) (15 mins)

Fault Injection in On-Chip Interconnects: A Comparative Study of Wishbone, AXI-Lite, and AXI (arXiv) (30 mins)

⚛️ Quantum

The Conversation: ‘Spooky Action at a Distance’ – A Beginner’s Guide to Quantum Entanglement And Why it Matters in the Real World (The Quantum Insider) (10 mins)

11 Quantum Startup Operators to Watch in Europe (Sifted – Paywall) (12 mins)

⚡️ Photonic / Optical

China positions itself to lead in future technologies like photonic chips (MERICS) (5 mins)

Ultrabroadband Plug-and-Play Photonic Tensor Core Packaging with Sub-dB Loss (Science Advances) (37 mins)

🧠 Neuromorphic

Wafer-scale Fabrication of Memristive Passive Crossbar Circuits for Brain-Scale Neuromorphic Computing (Nature Communications) (41 mins)

A Comparative Review of Deep and Spiking Neural Networks for Edge AI Neuromorphic Circuits (Frontiers in Neuroscience) (23 mins)

💥 Data Centers

Telcos Are Sitting on Untapped Gold. Here’s a Roadmap to Unlock It (DataCenterDynamics) (6 mins)

Unlocking the Power of Edge Computing Through Smarter Data Center Design (DataCenterDynamics) (7 mins)

🤖 AI

DeepSeek-V3.2-Exp: Boosting Long-Context Efficiency with DeepSeek Sparse Attention (GitHub) (15 mins)

Pure Foundry Market Share (Q1 2024 - Q2 2025). Source: Counterpoint.

Last week was dominated by later-stage, large-scale financings across the computing stack. Cerebras Systems raised $1.1B (and withdrew it’s IPO plans shortly after — see above), while Nscale secured an additional $433M “Pre-Series C” SAFE just days after its $1.1B Series B. Other sizable rounds spanned semiconductors, cloud, photonics, and quantum, underscoring continued momentum in advanced infrastructure.

EU governments have declared an “urgent need” for an ambitious follow-up to the 2023 Chips Act. In a joint declaration presented to the European Commission on September 29, all 27 member states called for semiconductors to be treated as a strategic industry on par with aerospace and defence.

The text sets out priorities to secure Europe’s strategic autonomy, strengthen technology leadership across the value chain, and enable faster commercialisation of innovation. Policy goals include:

• Boosting R&D from early stages through first industrial deployment.

• Aligning national, EU, and private investment with a secured semiconductor budget line for 2028–34.

• Setting measurable targets with regular evaluations.

• Scaling up production capacity, greener manufacturing, and workforce skills.

• Encouraging international joint ventures with “like-minded” partners.

The push comes after the European Court of Auditors warned earlier this year that the EU is “far off the pace” to double its global market share to 20% by 2030. Backed by 75 companies and research organisations under the Dutch-led Semicon Coalition Europe, the declaration now awaits Commission action.

Semicon Coalition & Industry: A United Front to Power Europe’s Semiconductor Future (ESIA - Official joint declaration)

EU Governments Set Out Priorities for Chips Act 2.0 (Science Business)

European Semiconductor Industry Endorses Semicon Coalition’s Call for a Revised EU Chips Act (SEMI)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Why advanced packaging has become a cornerstone of modern semiconductors, how different package types work, and recent developments such as heterogeneous integration, new bonding methods, interposers, and thermal management solutions.

• Spotlights: HSBC and IBM’s world-first empirical evidence that current quantum computers can add value in real-world trading, and imec’s breakthrough single-patterning High-NA EUV results proving a path toward sub-2nm logic nodes.

• Headlines: Semiconductor developments from space-grown materials to new transistor designs, a landmark proof of quantum advantage with advances in qubits and quantum internet, and further updates in photonic, neuromorphic, data centers, cloud, and AI.

• Readings: AI’s role in EDA (Electronic Design Automation) tools, chiplet interoperability, mapping the global quantum landscape, momentum in photonics, co-design for spiking neural networks, and new cooling approaches for data centers.

• Funding news: A wide spread of financings, from early-stage rounds in encryption, cooling, and quantum, to larger raises in semiconductors and connectivity, led by Nscale’s $1.1B Series B.

• Bonus: In light of Nvidia’s $100B bet on OpenAI, we explore how the data center race is being reshaped, with Oracle, SoftBank, and Alibaba expanding their roles in building the next generation of AI infrastructure.

Defining Advanced Packaging

Semiconductor packaging refers to the housing that surrounds a silicon die (a small piece of silicon containing the chip’s circuits), providing both physical protection and the electrical connections needed to link it to a circuit board.

Packaging began as a way to protect fragile chips, but over time it has become one of the most critical enablers of performance. Advanced packaging integrates multiple components into a single unit, often arranged side by side in 2.5D configurations or stacked vertically in 3D structures.

Drivers of Advanced Packaging

There are two main reasons why advanced packaging has become essential: higher bandwidth and lower power.

Higher bandwidth is needed because traditional packages limit the number of signals that can leave the die due to pin spacing (the distance between the electrical connection points on a chip). By routing signals inside the package instead of across a printed circuit board (PCB), advanced packaging enables much denser interconnects and therefore achieves higher bandwidth.

Lower power is equally important. The energy required to transmit a signal increases with distance. PCB traces often span centimeters, while intra-package traces are only millimeters long. These shorter distances reduce the drive strength needed, which lowers the energy per signal. Even if total energy consumption rises because more signals are transmitted, advanced packaging still delivers lower power per bit.

Key Types of Advanced Packaging

Advanced packages differ in how they connect chips to the board and to each other.

• Lead arrays distribute connections across the entire chip, supporting thousands of short, efficient links. This avoids the pad-limited designs of earlier packages, where connections were confined to the edges of the die.

• Multi-component packages integrate several chips into one unit. This saves PCB space and improves performance by keeping interconnects short, compared to placing chips in separate packages.

• Surface-mount packaging connects the chip to the printed circuit board (PCB) with tiny metal bumps that are melted into place. It supports many more connections and allows components on both sides of the board, replacing older methods where long pins went through drilled holes.

• Fan-out packaging routes signals outward beyond the die footprint, enlarging the package but enabling many more connections. It evolved from fan-in designs, where signals were routed inward to keep the package size close to the die (chip-scale packaging).

• Redistribution layers (RDLs) are extra wiring layers inside the package that take the chip’s tightly packed connection points and spread them out so they can attach to the printed circuit board (PCB).

New Advances in Packaging

The field of advanced packaging is progressing on many fronts at once, from how different chips are combined and bonded to new materials, cooling strategies, and reliability improvements. The categories below highlight the main areas where engineers are pushing the boundaries.

Heterogeneous integration makes it possible to combine different types of chips in a single package. After decades of development, 3D packaging technologies are becoming one of the key enablers of heterogeneous integration and are now reaching maturity and moving into practical use. This progress also brings challenges, such as uneven aging, warpage, and mechanical stress.

Leadframes are thin metal sheets that provide both mechanical support and electrical pathways. Once mainly used for low-cost packaging, they are now being adapted for high-performance applications, with new designs that allow denser connections and the integration of multiple chips.

Bonding (the process of attaching and electrically connecting chips inside a package) can be achieved through different methods, and these are diversifying. Wirebonding remains widely used, but other approaches are advancing. Thermocompression bonding and laser-assisted bonding enable more precise chiplet integration. Hybrid bonding is emerging as one of the most promising techniques for 3D stacking.

Interposers and bridges are increasingly used to improve connectivity between chips. Acting as intermediate connection layers, they enable shorter and denser wiring that improves performance and lowers power. Work is ongoing with silicon, organic, and glass interposers, each offering different tradeoffs in cost, precision, and signal isolation.

Panels represent a new approach where large rectangular substrates are used instead of circular wafers. This makes it possible to process more chips at once and lower costs. The main advancement here is fan-out panel-level packaging (FOPLP), which extends this method and aims to reduce assembly costs further if yields can be scaled.

Assembly methods include the processes used to put package components together. The key development is the introduction of Package Assembly Design Kits (PADKs), which bring more standardization to the design process. By checking connectivity and reliability upfront, PADKs help reduce errors, improve yields, and shorten cycle times.

Thermal management is becoming more critical as power density continues to rise and chips generate more heat in smaller areas. One approach under development is package-integrated vapor chamber heat spreaders, which are built directly into the package and provide much lower thermal resistance than conventional cooling methods.

Reliability challenges are also in focus. Thinner dies improve performance but make chips more fragile, increasing risks such as warpage, where the die bends or twists out of shape, die-pop, where the die separates from the package during assembly, and electromigration, the gradual wearing down of metal interconnects under high current. Optimized reflow processes are helping to reduce these defects and improve long-term reliability.

Source: Advanced Packaging Fundamentals (SemiEngineering, 2025)

Lead arrays distribute connections across the entire chip, supporting thousands of short, efficient links. Source: SemiEngineering.

⚛️ HSBC demonstrates world’s first-known quantum-enabled algorithmic trading with IBM (HSBC)

HSBC and IBM ran the first publicly disclosed hybrid quantum–classical trial on production-scale trading data in the European corporate bond market. Using IBM’s Heron quantum processor integrated with classical workflows, the system achieved up to 34% improvement in predicting quote-fill probabilities compared to standard statistical models. The trial targeted RFQ optimisation in OTC bond trading, where pricing signals are noisy and multi-factorial. Results suggest that near-term quantum processors, when combined with classical methods, can enhance market-making strategies by uncovering patterns classical approaches alone miss.

💥 Imec achieves new milestones in single patterning High NA EUV lithography for both damascene and direct metal etch (imec)

imec announced two major breakthroughs in single-patterning High-NA EUV, a next-generation chip manufacturing technology. It created 20nm-pitch metal line structures with 13nm spacing, needed for future interconnect layers, and demonstrated ruthenium lines at 20nm and 18nm pitch using a new etching process. The latter achieved a 100% electrical yield, proving the structures can function reliably. These advances mark an important step toward sub-2nm logic nodes, helping reduce manufacturing steps and costs compared to today’s multi-patterning techniques, and strengthening Europe’s roadmap for advanced semiconductor scaling.

Last week’s headlines featured semiconductor developments from infrastructure deals to space-grown materials and new transistor designs, a landmark proof of quantum advantage with advances in qubits and quantum internet, and further updates in photonic, neuromorphic, data centers, cloud, and AI.

🦾 Semiconductors

The billion-dollar infrastructure deals powering the AI boom (TechCrunch)

Space Forge Inc. and United Semiconductors LLC Partner to Develop the Supply Chain for Space-Grown Semiconductor Materials (Space Forge)

MIT engineers develop a magnetic transistor for more energy-efficient electronics (MIT News)

NVIDIA Seeks to Raise HBM4 Specs in Response to AMD Competition; SK hynix Expected to Remain Largest Supplier in 2026, Says TrendForce (TrendForce)

Synopsys Collaborates with TSMC to Enable 2D and 3D Design Solutions (Synopsys)

US to Southeast Asian chipmakers: shift production to America or face ‘tariff solution’ (South China Morning Post)

⚛️ Quantum

Proven quantum advantage: Researchers cut the time for a learning task from 20 million years to 15 minutes (Phys.org)

Physicists nearly double speed of superconducting qubit readout in quantum computers (Phys.org)

Miniaturized ion traps show promise of 3D printing for quantum-computing hardware (LLNL)

MIT-Led Research Creates Tool That Makes Generative AI Models More Likely to Create Quantum-Ready Materials (The Quantum Insider)

Alice & Bob’s Preliminary Results Vastly Surpass Previous Bit-Flip Time Record (The Quantum Insider)

QuEra And Collaborators Report on Cutting Runtime Overheads to Accelerate Real-World Applications For Quantum Computers (The Quantum Insider)

IonQ Achieves Significant Quantum Internet Milestone, Demonstrates Quantum Frequency Conversion to Telecom Wavelengths (Business Wire)

⚡️ Photonic / Optical

Optical Chip Beats Counterparts in AI Power Efficiency 100 Fold (All About Circuits)

STARLight Project Chosen as the European Consortium to Lead Next-Generation Silicon Photonics on 300 mm Wafers (STMicroelectronics)

Semiconductor Laser Research Could Advance Quantum Communications, Other Advanced Techs (The Quantum Insider)

Neurophos photonic AI test chip hits 300 TOPS/W (EE Times)

🧠 Neuromorphic

Strathclyde Uni Joins UK’s First Neuromorphic Computing Hub (DIGIT)

Kaist Creates Self-correcting Memristor For AI Chips (Dataconomy)

50 % neural quantum architecture achieves lower latency via elastic dataflow (Fly KFormer) (Quantum Zeitgeist)

💥 Data Centers

Rick Perry’s data center REIT Fermi targets $13 billion valuation in US IPO (Reuters)

Driving the Future of AI Datacenters with STMicroelectronics’ Silicon Photonics and BiCMOS Technologies (STMicroelectronics)

☁️ Cloud

Microsoft cuts cloud services to Israeli military unit over Palestinian surveillance (TechCrunch)

Oracle is reportedly looking to raise $15B in corporate bond sale (TechCrunch)

🤖 AI

OpenAI’s Sam Altman and the father of quantum computing just agreed on a Turing Test 2.0 (Business Insider)

Alibaba to offer Nvidia’s physical AI development tools in its AI platform (TechCrunch)

SAP and OpenAI partner to launch sovereign ‘OpenAI for Germany’ (OpenAI)

Synopsys-collaboration enables workflows for TSMC advanced node technologies accelerating AI. Source: Synopsys.

This week’s reading list looks at AI’s evolving role in chip design, chiplet interoperability, global quantum computing trends, new momentum in photonics, advances in spiking neural networks, and novel cooling approaches for AI data centers.

🦾 Semiconductors

The Limits of AI’s Role in EDA Tools (SemiEngineering) (16 mins)

Benefits and Challenges of Using Chiplets (SemiEngineering) (14 mins – Video)

An Open Framework for exploring Architecture Interoperability driving multi-vendor Chiplet Eco-systems (Open Compute Project) (8 mins)

⚛️ Quantum

Quantum Computing Companies in 2025: Mapping the Global Quantum Landscape (The Quantum Insider) (60 mins)

Quantum Chemistry: Making Key Simulation Approach More Accurate (The Quantum Insider) (7 mins)

⚡️ Photonic / Optical

Rotation manipulating photonic spin Hall effect based on Au-graphene heterostructure (ScienceDirect) (9 mins)

New Investments Flowing Into Photonics—Part 1: Trends Pointing Upwards (All About Circuits) (8 mins)

The Photonics Skills Gap Threatens Innovation in Quantum and AI (AZoOptics) (13 mins)

🧠 Neuromorphic

Balancing Accuracy and Efficiency: Co-Design of Hybrid Quantization and Unified Computing Architecture for Spiking Neural Networks (Frontiers in Neuroscience) (3 mins)

💥 Data Centers

AI chips are getting hotter. A microfluidics breakthrough goes straight to the silicon to cool up to three times better (Microsoft) (15 mins)

40 years of EDA: advancing from manual layouts to high-level synthesis, enabled by powerful algorithms and design abstractions. Source: SemiEngineering.

Last week’s financings ranged from early Seed and Series A rounds in encryption, cooling, and quantum to several large later-stage raises. The standout was Nscale’s $1.1B Series B in data centers, alongside significant activity in semiconductors and connectivity.

Nvidia’s plan to invest up to $100B in OpenAI is one of the largest private bets yet on AI infrastructure. The deal centers on deploying 10 gigawatts of Nvidia systems for OpenAI’s next generation of data centers and signals a shift in OpenAI’s reliance away from Microsoft toward a broader set of partners.

Alongside this, OpenAI is advancing its Stargate project with Oracle and SoftBank, with estimates placing its total buildout costs at as much as $850B.

Alibaba is also expanding its global cloud footprint, while policy experts are examining how AI infrastructure could both strain and strengthen the electric grid. Oracle, meanwhile, is taking on significant debt to finance its role in the AI data center build-out.

Altman, Huang and the last-minute negotiations that sealed the $100 billion OpenAI-Nvidia deal (CNBC)

OpenAI and NVIDIA Announce Strategic Partnership to Deploy 10 Gigawatts of NVIDIA Systems (NVIDIA Newsroom)

Sam Altman on worries about OpenAI’s $850 billion in planned buildouts (CNBC)

OpenAI is building five new Stargate data centers with Oracle and SoftBank (TechCrunch)

Alibaba Cloud Announces International Expansion Plans to Power the Next-Generation AI Innovations (Alibaba Cloud)

Oracle takes on $18bn in debt ahead of AI data center build-out (Data Center Dynamics)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: In light of Groq’s recent $750M funding round, we explore its Language Processing Unit (LPU), purpose-built for inference, and how the company compares to Nvidia, AMD, and Cerebras.

• Spotlights: The European Semiconductor Industry Association’s (ESIA) position paper on the proposed EU Chips Act 2 and Microsoft’s blueprint for what it calls the “world’s most powerful data center”.

• Headlines: Nvidia’s $5B Intel stake, Quantinuum’s ‘unconditional’ quantum supremacy claim, new photonic and neuromorphic advances, data center and cloud infrastructure moves, and soaring AI valuations.

• Readings: Advanced foundry revenues, memory scaling, quantum investment strategies, 3D-printed optics, neuromorphic markets, gigawatt-scale data centers, and edge AI trends.

• Funding news: A slower week overall, with activity spanning early-stage financings in quantum, photonics, and data centers, alongside larger raises in AI and networking, capped by Groq’s $750M round.

• Bonus: The latest front in the U.S.–China chip wars, as Washington and Beijing escalate export restrictions and probes, while Huawei accelerates its own AI chip and infrastructure push.

Last week, Groq raised $750M at a $6.9B valuation, more than doubling its valuation from just a year ago. Combined with a $1.5B Saudi Arabia infrastructure deal, Groq is positioned as a serious contender in the AI hardware race.

But what exactly is Groq’s bet? The answer lies in the Language Processing Unit (LPU), Groq’s custom-built chip designed specifically for AI inference.

What is a Language Processing Unit (LPU)?

The LPU is Groq’s clean-sheet alternative to GPUs, built solely for AI inference. While GPUs evolved from graphics and excel at parallel training, inference (especially real-time, batch-of-one workloads) requires a different architecture.

The LPU is built around four first-principle design choices:

• Software-first: The compiler was built before the chip. It schedules every operation deterministically across LPUs, removing the need for custom kernels and ensuring full utilization.

• Programmable assembly line: A single pipeline (“conveyor belt”) streams data through compute units in lockstep. Multiple LPUs link seamlessly, scaling linearly without external switches or routers.

• Deterministic execution: No caches, no branch predictors, and no variability. Each instruction takes a fixed number of cycles, guaranteeing predictable latency for real-time systems.

• On-chip memory: 80 TB/s SRAM bandwidth keeps data local, ~10× faster than GPUs using off-chip HBM (~8 TB/s), cutting latency and boosting efficiency.

Result: Up to 10× lower latency and 10× higher memory bandwidth than GPUs for inference.

Can Groq Overcome Nvidia’s Moat?

Nvidia is not standing still, and CUDA remains a massive moat. Beyond software inertia, enterprises calculate total cost of ownership (TCO) around Nvidia’s ecosystem, which makes switching even harder unless gains are overwhelming. But Groq has a strong tailwind: inference demand is growing faster than Nvidia can supply, and governments and enterprises seek cost savings, sovereignty, and diversification. Still, Nvidia is likely to keep leading the AI hardware market, though Groq’s focus on inference is carving out real momentum.

How Does Groq Compare to Nvidia, AMD, and Cerebras?

Groq

• Valuation: $6.9B (private, 2025)

• Performance: LPU chip (~725 TOPS); ~10× lower inference latency vs GPUs

• Efficiency: On-chip SRAM (~10× GPU bandwidth); linear scale-out without bottlenecks

• Target Market: Real-time inference (LLMs, NLP, vision); GroqCloud API & GroqRack clusters

→ Groq is purpose-built for inference, with deterministic design and on-chip memory that deliver latency and efficiency GPUs can’t match. But to succeed, it must also grow adoption of its own compiler and software stack against Nvidia’s CUDA ecosystem, which most developers rely on and rarely switch away from.

Nvidia

• Valuation: ~$4T (public, 2025)

• Performance: H100 GPU - one example of many - (~1,000 TFLOPs; 80–96 GB HBM); gold standard for training, strong inference throughput at high batch sizes

• Efficiency: Off-chip HBM; ~700 W per GPU; optimized by CUDA ecosystem

• Target Market: End-to-end AI across cloud, data centers, and edge

→ Nvidia remains the $4T giant with ~80% market share, dominating both training and inference. GPUs excel at high-throughput inference, though batch-of-one, real-time workloads remain less efficient — the exact gap Groq is trying to exploit. CUDA lock-in, however, makes it hard for customers to switch.

AMD

• Valuation: ~$150B (public, 2025)

• Performance: MI300X GPU (192 GB HBM3; 5.3 TB/s bandwidth); outperforms Nvidia H100 on LLM inference throughput

• Efficiency: Fewer GPUs per model thanks to larger memory; chiplet design improves perf/W

• Target Market: Large-model inference and HPC; enterprise AI

→ AMD’s MI300X closes the gap, with 192 GB of HBM3 and higher LLM inference throughput than Nvidia’s H100, allowing larger models to fit on fewer chips. This memory advantage reduces complexity and boosts efficiency, but adoption is still slowed by CUDA inertia despite AMD’s stronger raw performance.

Cerebras

• Valuation: ~$3B (private, 2024)

• Performance: WSE-3 wafer-scale chip (~125 PFLOPs BF16; 40+ GB on-chip memory); 850k cores on a single wafer

• Efficiency: On-wafer memory; no networking overhead; ~20 kW power per wafer

• Target Market: Ultra-large model training/inference; sovereign AI and national labs

→ Cerebras takes the opposite approach to Groq’s modular pipeline, concentrating compute on one massive wafer for extreme-scale models. Its WSE-3 delivers 125 PFLOPs and 40+ GB of on-chip memory while avoiding multi-chip networking. The tradeoff is cost and power, with each wafer drawing ~20 kW.

Sources: Groq’s $6.9B AI Chip Surge: Inside the Inference Revolution (TS2, 2025); What is a Language Processing Unit? (Groq, 2025)

“The Groq LPU programmable assembly line architecture (above) is much faster and more efficient than the GPU’s “hub and spoke” approach (below).” Source: Groq.

🦾 ESIA Position Paper: EU Chips Act 2 — Europe’s Path Towards Semiconductor Leadership (European Semiconductor Industry Association)

The European Semiconductor Industry Association (ESIA) has published a position paper on the proposed EU Chips Act 2. Building on the 2023 Chips Act that aimed to double Europe’s market share to 20% by 2030, ESIA calls for a stronger focus on industrial deployment, AI leadership, and innovation infrastructure to close Europe’s competitiveness gap.

Key recommendations include:

• Establishing a dedicated semiconductor budget with faster and more flexible funding.

• Expanding “first-of-a-kind” (FOAK) support to cover upstream suppliers, equipment makers, and joint ventures.

• Prioritizing chips for AI, both foundational and leading-edge.

• Creating an institutionalized high-level dialogue between policymakers and industry.

• Simplifying administrative and regulatory rules to boost innovation.

💥 Microsoft unveils the “world’s most powerful data center” (Heise)

“Microsoft unveils the blueprint for its next generation of AI data centers. The first location will be built in Mount Pleasant, Wisconsin, where Microsoft plans to put hundreds of thousands of Nvidia Blackwell accelerators into operation in early 2026. The cost is expected to be $3.3 billion. According to Microsoft, the Fairwater data center in Wisconsin will provide 10 times more computing power than the world's best-equipped data center today when it is completed. It is not clear which hyperscaler will operate it – private companies do not register their systems in the Top500 list of the world's fastest supercomputers. Since Microsoft, Meta, Amazon, and Google, among others, already operate data centers with more than 100,000 accelerators, Microsoft's new building could approach the million GPU mark.”

Last week’s headlines featured new semiconductor collaborations, a dense wave of quantum breakthroughs, advances in photonic and neuromorphic tech, developments in data centers and cloud, and soaring AI valuations.

🦾 Semiconductors

Nvidia buys $5B stake in Intel, planning AI chip collaboration (TechCrunch)

Siemens unveils groundbreaking Tessent AnalogTest software for automated analog circuit test generation (Siemens)

MediaTek develops chip utilizing TSMC’s 2nm process, achieving milestones in performance and power efficiency (MediaTek)

NVIDIA and United Kingdom Build Nation’s AI Infrastructure and Ecosystem to Fuel Innovation, Economic Growth and Jobs (NVIDIA)

New AI-native processor for edge applications offers 100x power and performance improvements over 32-bit MCUs (Ambient Scientific)

Nvidia just spent over $900 million to hire Enfabrica CEO, license AI startup’s technology (CNBC)

Trump-UAE Deals: AI Chips and Investments Spark Controversy (Markets.com)

⚛️ Quantum

Quantum Motion Delivers the Industry’s First Full-Stack Silicon CMOS Quantum Computer (Quantum Motion)

Julich Supercomputing Center becomes world’s first HPC center to deploy NVIDIA DGX-Quantum System (PR Newswire)

Quantinuum Researchers Report ‘Unconditional’ Quantum Supremacy (The Quantum Insider)

IonQ Announces Intent to Acquire Vector Atomic, Expanding Into Quantum Sensing and Strengthening Its Quantum Technology Portfolio (IonQ)

Riverlane Launches DeltaKit, A New Software Platform for QEC (Riverlane)

Infleqtion Unveils New Architecture to Accelerate Its Quantum Computing Roadmap To Achieve 1000 Logical Qubits by 2030 (Infleqtion)

“Quantum squeezing” a nanoscale particle for the first time (Phys.org)

Physicists create new electrically controlled silicon-based quantum device (Phys.org)

⚡️ Photonic / Optical

LightSolver Announces Breakthrough in Physical Modeling on the LPU and New Roadmap for Optical Analog PDE Solving (LightSolver)

Nanoscale optical device enables independent control of light intensity and phase using electricity (Phys.org)

OPROCESSOR INC Announces Breakthrough VCSEL-Based Photonic Interposer Technology (OPROCESSOR)

🧠 Neuromorphic

BrainChip expands global reach; announces Akida boards and AI development kits available at DigiKey (FOX4KC)

UCL to lead UK’s brain-inspired computing push with new innovation centre (UCL)

💥 Data Centers

OpenAI announces Stargate UK, with up to 8,000 GPUs at Nscale data centers (Data Center Dynamics)

Cadence Adds Digital Twin for Nvidia’s AI Data Center Compute Platform (All About Circuits)

Axiom Space, Spacebilt Announce Orbital Data Center Node Aboard International Space Station (Axiom Space)

If you’d like to learn more about orbital data centers, check out our interview with Starcloud!

☁️ Cloud

How AI Startups Are Fueling Google’s Booming Cloud Business (TechCrunch)

🤖 AI

UK at risk of becoming AI “users, not makers”, says Hoberman, as Nvidia and Microsoft pledge billions (Tech.eu)

Elon Musk’s xAI raising $10 billion at $200 billion valuation: sources (CNBC)

“Illustration of the joint use of technology from Jülich Supercomputing Centre, NVIDIA, Arque Systems and Quantum Machines.” Source: PR Newswire.

This week’s reading list includes updates on advanced foundry revenues and memory scaling, quantum investing and machine learning, 3D-printed optics, neuromorphic theory and markets, the rise of gigawatt-scale data centers, and edge AI and connectivity trends.

🦾 Semiconductors

Global Semiconductor Foundry 2.0 Market’s Q2 2025 Revenue Up 19% YoY Driven by Advanced Process and Packaging (Counterpoint Research) (5 mins)

Scaling Memory With Molybdenum (SemiEngineering) (7 mins)

⚛️ Quantum

How to invest in quantum stocks: A guide to long-term investing in quantum technology (The Quantum Insider) (15 mins)

Quantum Optical Circuits Enable Kernel Learning for Support Vector Machines (Quantum Zeitgeist) (10 mins)

⚡️ Photonic / Optical

3D-Printed Optics and Photonics: Unlocking the Third Dimension (Optics & Photonics News) (10 mins)

Photonics Market by Product Type ‒ Global Forecast to 2030 (Markets and Markets) (12 mins)

Photonics Chipmakers Race to Production (EE Times) (13 mins)

Semiconductors & Photonics (2025) (Sifted) (20 mins ‒ Paywall)

🧠 Neuromorphic

Neuromorphic Intelligence Leverages Dynamical Systems Theory to Model Inference and Learning in Sustainable, Adaptable Systems (Quantum Zeitgeist) (13 mins)

Neuromorphic Hardware Market Revenue and Forecast by 2033 (Precedence Research) (5 mins)

How does negative differential resistance relate to neuromorphic computing and sensors? (EEWorldOnline) (4 mins)

💥 Data Centers

xAI’s Colossus 2 – First Gigawatt Datacenter In The World (SemiAnalysis) (10 mins)

Data Center Server Rack Market Size, Share and Trends 2025 to 2034 (Precedence Research) (60 mins)

Five charts reveal how AI drives soaring data-center energy use and emissions (RECCESSARY) (18 mins)

📡 Connectivity

Private 5G networks and the Edge opportunity for telcos (Data Center Dynamics) (24 mins)

🤖 AI

From ARM to Edge AI Disruptor: How Noel Hurley Is Leading the Change with Logic-Based AI at Literal Labs (Tech.eu) (7 mins)

Making the Case for a Third AI Technology Stack (Brookings) (15 mins)

“Celestial’s Photonic Fabric™ enables chip-to-chip and rack-to-rack optical interconnects with high bandwidth and ultra-low latency for next-generation AI data centers.” Source: Celestial AI.

Last week saw fewer rounds than the week before, a little over half in number. Activity ranged from early-stage financings in quantum, data centers, and photonics to larger raises in AI and networking, capped by Groq’s $750M round.

And again: The U.S. and China are tightening the screws on each other’s semiconductor industries. Washington added two Chinese chipmakers to the so-called Entity List, while Beijing barred companies from buying Nvidia’s AI chips, accused it of antitrust violations, and launched new probes into U.S. semiconductors. Meanwhile, Huawei is moving fast to fill the gap with its own AI infrastructure and chip plans.

Huawei Announces New AI Infrastructure as Nvidia Gets Locked Out of China (TechCrunch)

China tells its tech companies they can’t buy AI chips from Nvidia (TechCrunch)

China Finds Nvidia Violated Anti-Monopoly Law, Will Carry Out Further Investigation (CNN)

China launches probes targeting US semiconductors ahead of Madrid trade talks (AP)

US penalizes two Chinese companies that acquired tools for chipmaker SMIC (Reuters)

China’s Huawei hypes up chip and computing power plans in fresh challenge to Nvidia (Reuters)

Nvidia CEO says he’s ‘disappointed’ after report China has banned its AI chips (CNBC)

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Happy Monday! Here’s what’s inside this week’s newsletter:

• Deep dive: Protein science as a new compute workload, why structure prediction is so demanding, and how GPUs and specialized hardware are being adapted.

• Spotlights: Apple’s new A19 chips with upgraded cooling and connectivity, and first insights from Mira Murati’s Thinking Machines Lab on making large-scale AI inference reproducible

• Headlines: New semiconductor launches, IPO moves and physics breakthroughs in quantum, expansions in photonics, nuclear debates in data centers, cloud partnerships, shifting alliances in AI, and much more.

• Readings: Chip bottlenecks and DRAM evolution, advances in quantum key distribution, photonic accelerators for AI, neuromorphic efficiency gains, and global data center, cloud trends, and much more.

• Funding news: Multi-billion rounds from PsiQuantum and Mistral, alongside early to mid-stage activity in semiconductors and photonics with most deals coming in under $60M.

• Bonus: A set of new neuromorphic market forecasts, covering chips, hardware, and sensors, all pointing toward steady growth and rising relevance across AI and next-gen computing.

An episode from the NVIDIA AI Podcast last week (From AlphaFold to MMseqs2-GPU: How AI is Accelerating Protein Science) inspired me to dig deeper into how biology is emerging as a new class of workloads that shape hardware requirements.

Predicting protein structures has become one of the most important computational problems of our time. It enables drug discovery and enzyme engineering. Yet the workloads that power this science are not only biologically complex but also some of the most compute-intensive tasks ever attempted outside of physics.

Why Protein Structure Prediction is Computationally Demanding

At the core of protein inference are usually two demanding stages: 1) generating multiple sequence alignments (MSAs), which search through massive protein databases to find and align evolutionarily related sequences, and 2) running deep learning models such as AlphaFold and OpenFold, which use this information to predict the final 3D structure. The first stage captures evolutionary context from billions of sequences, while the second relies on deep neural networks with tens to hundreds of millions of parameters.

• MSA bottleneck: Generating alignments for a given protein involves searching and matching across protein databases that contain hundreds of millions to billions of sequences. Even on modern GPUs, this step can dominate runtime (up to 80%) if not carefully optimized.

• Inference bottleneck: Once alignments are ready, the models themselves require enormous matrix multiplications, attention layers, and symmetry-aware geometry operations. These workloads are GPU-bound, resembling large language models in structure but with additional symmetry constraints from physics.

In the real world, you rarely care about just one protein. Drug discovery means running predictions for thousands of candidate proteins, and other fields like enzyme engineering may require testing entire sets of designed or natural variants.

This multiplies both bottlenecks by orders of magnitude, which is why even GPU clusters start to strain.

What Protein Workloads Demand from Hardware

Protein science workloads may look similar to AI or HPC, but they stress the hardware stack in distinct ways. Making them tractable requires processors tuned for these demands:

• High-Bandwidth Memory (HBM): Protein inference involves processing large alignment matrices and ensembles of candidate structures. Storing these in HBM provides bandwidth on the order of hundreds of GBs up to several TBs per second, which helps avoid I/O bottlenecks that would stall standard GPUs.

• Massive Parallelism: GPUs are inherently parallel, but biology workloads push this further. Tensor operations in protein models and redesigned sequence alignment algorithms demand extreme thread-level parallelism to reach usable performance.

• Multi-Instance Capability: A single GPU can be partitioned into multiple logical devices, each with dedicated compute and memory resources. This makes it possible to run several predictions in parallel on one chip, which is essential when screening thousands of proteins or processing large datasets efficiently.

Beyond raw hardware, software optimizations are required to unlock these features. Modern GPUs include specialized instructions, such as Tensor Core operations, which libraries expose to biology models. This hardware–software co-design is essential for symmetry-aware computations, delivering speedups while preserving accuracy.

How NVIDIA’s Latest GPU Targets Biology Workloads

NVIDIA just launched the RTX PRO 6000 Blackwell Server Edition GPU, showing up to 138× faster protein inference with MMseqs2-GPU (GPU-accelerated sequence alignment software) and OpenFold2 (open-source structure prediction model). With 96 GB of high-bandwidth memory and new software optimizations, it enables proteome-scale folding on a single server instead of a supercomputing cluster.

Further interesting sources:

• On the compute side: Accelerate Protein Structure Inference Over 100x with NVIDIA RTX PRO 6000 Blackwell Server Edition (NVIDIA Developer)

• On the biology side: AlphaFold - The Most Useful Thing AI Has Ever Done (Veritasium)

The NVIDIA RTX PRO 6000 Blackwell Server Edition GPU sets a new benchmark for protein structure inference. Source: NVIDIA.

🦾 Apple Debuts A19 and A19 Pro Processors for iPhone 17, iPhone Air and iPhone 17 Pro (Tom’s Hardware)

Likely built on TSMC’s N3P node, the new chips feature upgraded CPU/GPU cores with integrated Neural Accelerators for improved AI and graphics performance. The Pro models introduce a vapor-chamber cooling system, promising 20× better heat dissipation than previous designs. Apple is also deepening vertical integration with its own N1 networking chip and an updated C1X modem for more efficient connectivity.

🤖 Defeating Nondeterminism in LLM Inference (Thinking Machines)

Mira Murati’s $2B-backed research lab Thinking Machines Lab, staffed with former OpenAI researchers, has published a first look into its work on reproducible AI. The blog post explores why large language models return different answers even when using deterministic settings like temperature zero, challenges the common “concurrency + floating point” explanation, and outlines how inference engines might be redesigned to achieve truly reproducible results.

Last week’s headlines brought new chip launches and policy reviews in semiconductors, IPO moves and physics breakthroughs in quantum, updates in photonics, nuclear debates and big build-outs in data centers, major cloud deals, and shifting alliances in AI.

🦾 Semiconductors

SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI (SiFive)

Axelera AI Boosts LLMs at the Edge by 2× with Metis M.2 Max Introduction (Axelera)

NVIDIA Unveils Rubin CPX, a New Class of GPU Designed for Massive Context Inference (NVIDIA)

Keysight Introduces Two Frequency Extenders And Calibration Kit To Extend Broadband Vector Analyzer Up To 250 GHz (Keysight)

On another note: The European Commission asked stakeholders to evaluate and review the Chips Act.

⚛️ Quantum

Infleqtion to go public through merger with Churchill Capital Corp X (The Quantum Insider)

IonQ Secures Regulatory Approval from the UK Investment Security Unit (ISU) (IonQ)

Exotic Phase of Matter Realized on a Quantum Processor (Technical University of Munich)

Physicists measure expansion of quantum wavepacket in levitated atom experiment (Phys.org)

Time Crystals Break Out of the Quantum Lab (The Quantum Insider)

CDimension Delivers Wafer-Scale 2D Materials to Accelerate Quantum Roadmap by Cutting Noise (The Quantum Insider)

⚡️ Photonic / Optical

i4Networks Deploys Nokia’s Optical Solution to Deliver Data Center Interconnection Services Across the Netherlands (Nokia)

Silicon Photonics in the Spotlight: TSMC Lifts the Curtain on COUPE at SEMICON Taiwan (TrendForce)

Jenoptik Expands Optics Manufacturing at Jena Campus (Photonics)

💥 Data Centers

Data Center Developers Urge NRC to ‘Unleash’ Nuclear Power (E&E News)

NVIDIA and OpenAI to Spend Billions on UK Data Centers (Data Center Dynamics)

☁️ Cloud

OpenAI reportedly signs $300 billion Project Stargate cloud deal with Oracle (The Verge)

Why the Oracle-OpenAI Deal Caught Wall Street by Surprise (TechCrunch)

CoreWeave launches AI startup fund; shares jump 9% (Tech in Asia)

Google Cloud Launches Free Multicloud Transfers Amid EU Data Act (TechRepublic)

NATO Communications and Information Agency Selects Oracle Cloud Infrastructure (Oracle)

🤖 AI

Microsoft to lessen reliance on OpenAI by buying AI from rival Anthropic (TechCrunch)

Overview of recent CoreWeave developments. Source: Tech in Asia (article on CoreWeave’s new AI fund).

This week’s reading list covers chip bottlenecks and DRAM evolution, advances in quantum key distribution, photonic accelerators for AI inference, neuromorphic efficiency gains, and shifting dynamics in global data center and cloud markets.

🦾 Semiconductors

Huawei Ascend Production Ramp: Die Banks, TSMC Continued Production, HBM is The Bottleneck (SemiAnalysis) (22 mins)

Another Giant Leap: The Rubin CPX Specialized Accelerator & Rack (SemiAnalysis)(23 mins)

The Evolution of DRAM (SemiEngineering) (16 mins)

What Do LLMs Want From Hardware? (SemiEngineering) (16 mins)

Graphene & 2D Materials 2026-2036: Technologies, Markets, Players (IDTechEx) (9 mins)

⚛️ Quantum

Fault-tolerant Quantum Computing Achieves Exponential Speedup for Navier-Stokes Equations with Reduced Resource Overhead (Quantum Zeitgeist) (10 mins)

Twin Beams Generate 95% Correlated Random Numbers for Secure Communication (Quantum Zeitgeist) (3 mins)

Geometric Discord Enables Key Distribution and Boosts Secret Key Rates in QKD Protocols (Quantum Zeitgeist) (7 mins)

⚡️ Photonic / Optical

Seeing Is Believing: A Technical Deep Dive Into Lightmatter’s Hardware (Lightmatter) (8 mins)

Analog Plus 3D Optics to Accelerate AI Inference and Combinatorial Optimization (SemiEngineering) (3 mins)

Coloring Optical Signals for More Bandwidth in Data Centers (SemiEngineering) (10 mins)

🧠 Neuromorphic

DelGrad: exact event-based gradients for training delays and weights on spiking neuromorphic hardware (Nature) (30 mins)

Alleviating the Communication Bottleneck in Neuromorphic Computing with Custom-Designed Spiking Neural Networks (MDPI) (23 mins)

Comparing Neuromorphic Computing: Efficiency Gains (PatSnap Eureka) (9 mins)

💥 Data Centers

Top 10: Data Centre Companies in Europe (Data Centre Magazine) (6 mins)

North America Data Center Trends H1 2025 (CBRE) (10 mins)

Data Center Monitoring Market Size and Forecast 2025 to 2034 (Precedence Research) (13 mins)

☁️ Cloud

The World’s Largest Cloud Providers Ranked by Market Share (Visual Capitalist) (3 mins)

Overview of Huawei chip ecosystem. Source: SemiAnalysis.

Last week’s rounds underscored the scale divide in computing. AI and quantum dominated the top end with PsiQuantum ($2B) and Mistral ($1.7B). At the same time, semiconductors and photonics saw a string of early to mid-stage rounds below $60M. The pattern reflects capital concentrating in a few platform bets, while component-level innovation progresses in smaller steps.

A number of fresh market reports on neuromorphic computing were published last week. Different scopes, geographies, and methodologies, but one common theme: steady growth across chips, hardware, and sensors. Treat the figures as directional, since each report uses its own assumptions.

Neuromorphic Computing Market Opportunities and Challenges 2025–2032: Strategic Outlook (Newstrail)

Neuromorphic Hardware Market U.S. Growth Expected at 21.6% CAGR Through 2035 (Industry Today)

Global Neuromorphic Chip Market Report 2025: Size Projected USD 11.9 Billion, CAGR of 13.73% by 2033 (OpenPR)

Neuromorphic Sensors Market to Hit USD 10.6 Billion by 2035, Driving AI, Robotics, and Next-Gen Computing (Newstrail)

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